As mentioned in the i.MX7D RM section 4.2.5 Cortex-M4 Boot requirement, Cortex-A7 is responsible for enabling and providing clock to Cortex-M4, please see the image below:
Taking clue from the last point, using the SRC_M4RCR(M4 Reset Control Register) register's 3rd bit (ENABLE_M4) we can enable/disable M4.
Regards,
Karan Gajjar