Set SPNIDEN from fuse?

[rspliet]

Dear sir/madam,

Long story short, on my board I want to trace my Linux kernel using Coresight. Unfortunately, to allow the PTMs to trace through the kernel, SPNIDEN (Secure PL1 Non-Invasive Debug ENable, see ARMv7 ARM p2075) must be set high. I would like to do so from the bootloader (eg. without a JTAG device attached), and I'm only guessing that this is a value controlled by a fuse. Is this true? And if so, what parameters do I need to override this fuse from U-Boot?

Thanks,

Roy

[Yuri]

The i.MX6 does not support SPNIDEN-related fuse or register field.

  Generally  it is recommended to use the ETB. In this mode you don't need to

configure ETM, IO pins and you don't need even special trace hardware: standard

JTAG signals are used. The trace is collected via JTAG. The disadvantage in this mode

is that the trace is not collected in real time and the maximal size of trace buffer is 4K.

[rspliet]

Thank you for your reply!

I am indeed using the ETB (which by the way is 16KB on the I.MX6Q :smileyhappy: ), and I'm sure I configure all the CoreSight components correctly because I can get meaningful trace output. However, the trace output is limited to P0 (Linux user-space), whereas I also want trace from P1 (Linux kernel) in my buffer. The PTMs "ETMAUTHSTATUS" register informs me that Secure non-invasive debugging is not permitted, which is the reason the kernel trace is not generated and thus does not end up in the ETB. Documentation states that the "secure non-invasive debugging enable" bit is defined as (SPNIDEN OR SPIDEN) AND (NIDEN OR DBGEN). NIDEN and/or DBGEN are high, because non-secure non-invasive debugging is permitted (verified in the same ETMAUTHSTATUS register), so getting the SPNIDEN signal high should solve my problems.

I was hoping/assuming that SPNIDEN is controlled by a value in one of the fuses, but you claim it is not. Is there any way to control this signal from software?

[Yuri]

You may try to configure security level register bits for ARM DAP in CSU of the i.MX6.
Please refer to Security Reference Manual for i.MX6.

https://www.freescale.com/webapp/Download?colCode=IMX6DQ6SDLSRM&appType=moderatedWithoutFAE&fpsp=1&P...

[rspliet]

Thank you for this pointer. I have tried setting the corresponding CSU bits, but unfortunately to no avail. The PTM-A9 still reports it is not authorised to produce trace when the core is in the "secure" (P1) state.

[Yuri · Accepted solution]

The SPIDEN signal is an input to the ARM platform and that SPIDEN is driven by
the System JTAG Controller (SJC) in secure state. Please look at app note

AN4686 (Configuring Secure JTAG for the i.MX 6 Series Family of Applications

Processors) about Secure JTAG.

http://cache.freescale.com/files/32bit/doc/eng_bulletin/AN4686.pdf

Have a great day,
Yuri

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