SNVS HPCOMR protection

[vsiles]

On a sabre lite (i.MX6Q), we managed to access the SNVS HPCOMR register from a secure application and change the bit 31 (NPSWA_EN) from 0 to 1. That is, from PL0, which I consider unprivileged.   

The RM states:

The SNVS_HP Command Register contains the command, configuration, and control bits for the SNVS block. This is a privileged write register.

Since the HPCOMR[31] bit was 0, I didn't expect a userland application to be able to write to it, since it's protected.

Is my understanding of 'privileged' for the SNVS_HP register wrong ? Can someone explain this behavior ?

Best,

Vincent

[igorpadykov]

Hi Vincent

one can check AIPSTZx_MPR  master priviledge description, sect.58.4.1.1 Peripheral access i.MX6DQ RM :
The peripheral access (resource access) of the requesting master is given by the
corresponding RAR bit of the Peripheral Right Register. It determines if the master has
access privilege to the resource.

Best regards
igor
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[vsiles]

Ok, so this notion of privilege was liked to the AIPSTZ, not the PL0/PL1 level. Thank you.