SAI1 dma events pending but SDMA didn't get scheduled

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SAI1 dma events pending but SDMA didn't get scheduled

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vitaly_a
Contributor II

Hello,

I have a custom board built on IMX6UL with Audio codec connected to SAI1. Application works on vxworks. The BSP has its own SDMA and SAI drivers. When vxworks kernel is booted from uboot the Audio application works perfectly using SDMA engine. The problem is that I need to boot vxworks from a custom bootloader. When the kernel is booted from the custom bootloader the Audio application doesn't work. Debugging the issue I compared practically all registers in the both cases (booting from uboot and from custom bootloader) and couldn't find any differences (which I believe may affect the DMA. But when I boot from the custom bootloader I do see the pending events on 2 channels (SDMAARM_EVTPEND = 0x6) and tx and rx errors on SAI1 FIFO. Looks like SDMA scheduler doesn't see the events and doesn't drain/fill FIFOs. If Audio application just polls SAI FIFOs (doesn't use DMA) everything works.

Does anyone has an idea what I can miss to configure in the custom bootloader to make SDMA happy?

I appreciate any help.

Thanks,

Vitaly Andrianov

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ceggers1
Contributor IV

Another info. vxworks has Memory-to-Memory SDMA test witch works perfectly in both cases: booting from u-boot and from custom bootloader. Does that prove that SDMA has required privileges?

I think this means that the SDMA has privileges to access the RAM. But maybe the SDMA cannot access several peripherals. Most often this happens if a peripheral clock is disabled. But maybe this can also happen due to wrong AIPSTZ settings.

regards,
Christian

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ceggers1
Contributor IV

Hi Vitaly,

beside the SAI and SDMA registers, you should also check the CCM and AIPSTZ registers.

Maybe the SDMA is stuck due to problems accessing specific memory / peripheral regions. You may check the SDMAARM_ONCE_STAT.PST bits for the current state of the SDMA engine.

regards,
Christian

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vitaly_a
Contributor II

Hi Christian,

Thanks very much for the reply. I did check CMM registers and they are the same. From reference manual I read AIPSTZ bas address is 0x0. But when I read those addresses from u-boot it gave me some strange values. I don't believe I read the AIPSTZ. Could you confirm the 0x0 is correct address.

Another info. vxworks has Memory-to-Memory SDMA test witch works perfectly in both cases: booting from u-boot and from custom bootloader. Does that prove that SDMA has required privileges?

Thanks,

-Vitaly 

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998 次查看
ceggers1
Contributor IV

Another info. vxworks has Memory-to-Memory SDMA test witch works perfectly in both cases: booting from u-boot and from custom bootloader. Does that prove that SDMA has required privileges?

I think this means that the SDMA has privileges to access the RAM. But maybe the SDMA cannot access several peripherals. Most often this happens if a peripheral clock is disabled. But maybe this can also happen due to wrong AIPSTZ settings.

regards,
Christian

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vitaly_a
Contributor II

Christian,

I implemented the correct AIPS register configuration and it solved my problem.

Thank you very much for the help!!!!

-Vitaly  

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vitaly_a
Contributor II

I found the correct AIPS base addresses: 0x200_0000 and 0x210_0000. 

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vitaly_a
Contributor II
I found AIPSTZ base addresses.
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