Hello everyone,
I'm currently in the process of evaluating the theoretical and maximal DDR bandwidth of the i.MX 8M Plus processor. My setup is the IMX8MP-EVK evaluation board, running a Yocto Linux with kernel 6.1.55.
The board is equipped with 6GB of LPDDR4, the DDR core clock is set to 1GHz. In my understanding, the actual clock of the DDR is doubled (=2GHz), which leads to a theoretical data rate of 4000MT/s. With the 32-bit memory interface, this leads to a theoretical bandwidth of 4000MT/s * 4B = 16 GB/s.
When it comes to the practical bandwidth, I read that the real bandwidth is only half of this value. To get some real numbers, I used perf stat and some integrated metrics (imx8mp_ddr_read.all,imx8mp_ddr_write.all) to obtain the following results while running a stresstest with bandwidth64:
I have the following questions:
- Are these numbers real and represent the actual bandwidth that can be achieved on such a system?
- What could be the reason that read results are much lower than write results? In my understanding, it should be the other way around.
- For the total bandwidth, do I have to add "read" and "write" together or is this accelerated in hardware?
Best regards
Markus
