I am using the CSI_PIXCLK line for UART6 RX but am having problems with receiving any data. The TX line on CSI_MCLK works fine. I am working with an MCIMX6Y2DVM05AB processor. Is there any errata that pertains to this?
Initialization Code:
IOMUXC_SW_MUX_CTL_PAD_CSI_MCLK = IOMUXC_SW_MUX_CTL_PAD_CSI_MCLK_MUX_MODE(8) \
| (0<<IOMUXC_SW_MUX_CTL_PAD_CSI_MCLK_SION_SHIFT);
IOMUXC_SW_MUX_CTL_PAD_CSI_PIXCLK = IOMUXC_SW_MUX_CTL_PAD_CSI_PIXCLK_MUX_MODE(8) \
| (0<<IOMUXC_SW_MUX_CTL_PAD_CSI_PIXCLK_SION_SHIFT);
IOMUXC_SW_PAD_CTL_PAD_CSI_MCLK = 0x10B0;
IOMUXC_SW_PAD_CTL_PAD_CSI_PIXCLK = 0x1090;
IOMUXC_UART6_RX_DATA_SELECT_INPUT = IOMUXC_UART6_RX_DATA_SELECT_INPUT_DAISY(3);
已解决! 转到解答。
Not using M core, I spoke with IAR as the ports worked in other test apps. It is a problem with the sample IAR code provided by NXP not being compatible with their latest IAR Workbench release. The ports actually do work.
pls check this document, to check if your settings has any pins conflict and check your dts settings
Not using M core, I spoke with IAR as the ports worked in other test apps. It is a problem with the sample IAR code provided by NXP not being compatible with their latest IAR Workbench release. The ports actually do work.