Priority 0 interrupt being blocked

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Priority 0 interrupt being blocked

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hedazhuang
Contributor I

Hello,

I am using rt1165 to implement a design with 2 interrupts. The fast interrupt is set as priority 0, and the slow interrupt is set as priority 1. But the fast interrupt trigger is influenced by the slow one as shown in the graph.

hedazhuang_0-1677573170640.png

The yellow wave is GPIO triggered in the fast interrupt and the purple one is in the slow interrupt. Somehow once the slow interrupt is triggered, the fast interrupt with priority 0 is influenced. 
What could be the issue? How should I debug that?

Thank you.

 

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello
I hope you are well.

This lecture might be helpful to understand what is happening on the interruptions: Beginner guide on interrupt latency and Arm Cortex-M processors - Architectures and Processors blog ...

It will be helpful to detail what your IRQs are specifically doing. Is all the routine on the IRQ?
What do you mean by influenced? Does it mean that the lowest-priority IRQ is making the high-priority IRQ take more time to be executed?

Best regards,
Omar

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hedazhuang
Contributor I

Hello Omar,

Thank you for your reply.

In the picture, I uploaded. The yellow waveform is one gpio that I set to high when the priority 0 PWM interrupt is triggered. The PWM interrupt is set at 30k herz. It runs similar operations under similar clk cycle counts within a short time.

While the purple timer interrupt(lower priority) is triggered, the operation in the high interrupt (yellow) is delayed and needs a longer time to execute. Shown under red arrows.
There is also a chance the PWM interrupt interval is delayed. Shown in the green arrows

hedazhuang_1-1678725200019.png

 

I am not very clear on why this happened. Do you have any suggestions?

Thank you.

 

 

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

Thank you for your additional information.

I suggest you load the code to ITCM memory since it is the memory with the better performance on this device. Ideally, the IRQ must be kept as simple as possible like only setting a flag. It will be helpful to discard the following scenarios to check if the Interruptions are behaving the way they should.

Best regards,
Omar

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