POR on the i.MX6DL

[matthewreed]

We are building an i.MX6 Dual system with an external watchdog. Actually the external watchdog is another, smaller, micro that will monitor the operation of the i.MX6. We had thought that it could reset the i.MX6 by pulling the POR low, and detect when the i.MX6 had reset by monitoring the POR line - we assumed it would go low when the processor was reset (due to some internal reason).

But - things I am reading on the internet seem to refute that. The i.MX6 reference manual was unclear on this.

I see many posts where people are using the WDOG_B line to the PMIC to perform a "proper" reset.

We can wire our monitor processor to do that, but how do we detect when the i.MX6 has performed its own reset?

Any help greatly appreciated.

-Matt

[igorpadykov · Accepted solution]

Hi Matt

one can connect external watchdog instead WDOG_B in

attached sabre schematic p.21. Reset sequence is complex

procedure described in Chapter 60 System Reset Controller (SRC)

i.MX6DQ Reference Manual  http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf

and there is no external signal which indicates that i.MX6 has finished its own reset.

Best regards

igor

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