PCIe read error on iMX8

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PCIe read error on iMX8

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fleminjose
Contributor I

Hi,

We’re doing DMA transfer using a custom PCIe device on iMX8M-EVK. When the PCIe device tries to read host memory, a ‘Unsupported Request’ status is obtained for the completion. This error is observed on linux kernel versions 5.4 and 5.10. We haven’t seen this issue on linux 4.19 kernel.

The inbound address that we are seeing on TLP packet is 0x59F77180.

imx8_m2_failed_boot_block_3.png

We need to verify whether the inbound window register is configured correctly on iMX8. For this we map the PCIe base address (0x33800000) and dump the register offset given the ‘PCIe Memory Map’ section of iMX8 reference manual. I’m pasting the register dump here.

[PCIe register dump from offset 0x0 ]

root@imx8mq-evk:~/flemin/phymem# ./phymem-test -a 0x0

0x00000000 : 0xabcd16c3 0x00100406 0x06040001 0x00010000

0x00000010 : 0x20000000 0x00000000 0x00000000 0x000000f0

0x00000020 : 0x20302010 0x0000fff0 0x00000000 0x00000000

0x00000030 : 0x00000000 0x00000040 0x00000000 0x000201f3

0x00000040 : 0xdbc35001 0x00000000 0x00000000 0x00000000

0x00000050 : 0x01017005 0x443ba4f8 0x00000000 0x00000000

0x00000060 : 0x00000000 0x00000000 0x00000000 0x00000000

0x00000070 : 0x00420010 0x00008000 0x00102010 0x0071cc12

0x00000080 : 0x30120000 0x00000000 0x004003c0 0x00000008

0x00000090 : 0x00000000 0x0000041f 0x00000000 0x00000006

0x000000a0 : 0x00000002 0x00000000 0x00000000 0x00000000

0x000000b0 : 0x00000000 0x00000000 0x00000000 0x00000000

0x000000c0 : 0x00000000 0x00000000 0x00000000 0x00000000

0x000000d0 : 0x00000000 0x00000000 0x00000000 0x00000000

0x000000e0 : 0x00000000 0x00000000 0x00000000 0x00000000

0x000000f0 : 0x00000000 0x00000000 0x00000000 0x00000000

0x00000100 : 0x14820001 0x00000000 0x00400000 0x00462030

0x00000110 : 0x00000001 0x0000e000 0x000000a0 0x00000000

0x00000120 : 0x00000000 0x00000000 0x00000000 0x00000000

0x00000130 : 0x00000000 0x00000000 0x00000000 0x00000000

0x00000140 : 0x00000000 0x00000000 0x0001001e 0x00280a1b

0x00000150 : 0x00000a00 0x00000028 0x00000000 0x00000000

 

We are seeing the expected values in the offsets from 0x0 to 0xB44. According to the iMX8 reference manual, the iATU and DMA register offsets starts from the offset 0x80000000 to 0x80080320. (This offset looks strange. We are adding the offset with PCIe base address for obtaining th physical address of iATU registers)

 

[PCIe register dump of offset from 0x80000000]

root@imx8mq-evk:~/flemin/phymem# ./phymem-test -a 0x80000000

0x80000000 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x80000010 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x80000020 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x80000030 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x80000040 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x80000050 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x80000060 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x80000070 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x80000080 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x80000090 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x800000a0 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x800000b0 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x800000c0 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x800000d0 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x800000e0 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x800000f0 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x80000100 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

0x80000110 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

...

0x80000200 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff
0x80000210 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

...

0x80000300 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff
0x80000310 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

...

0x80000400 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff
0x80000410 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

...

0x80000500 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff
0x80000510 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

...

0x80000600 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff
0x80000610 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff

...

0x80000700 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff
0x80000710 : 0xffffffff 0xffffffff 0xffffffff 0xffffffff


As seen above, all the iATU registers in PCIe register map is read as 0xffffffff. Are we reading the correct offset? Does the 0x80000000 offset from PCIe base address gives correct physical address of inbound window registers?

How I can verify if the PCIe inbound window registers are configured correctly?

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