Hi expects,
Recently, wo found that wo chose 166MHz in DDR mode of MIMXRT1171,and the oct flash signal waveform would be overshot. Is this normal and can I choose 166MHz to use in DDR mode? If i can, how it needs to be optimized. Thanks a lot.
Hi Yang,
Hope you are doing well.
Apologies for delay in response.
Is this design simulated for Signal Integrity?
One can try adding series termination resistor on clock line and check with different values to decrease the overshoot and undershoot.
Thanks & Regards,
Ritesh M Patel
Hi Yang,
Is there any series termination on the DQS line?
If not, one can try adding series termination resistor of low value on DQS line and observe the improvement on oscilloscope.
Thanks & Regards,
Ritesh M Patel
Hi Patel,
Thanks for your suggestions, we will try it.