MX8MP RMII TXEN wiring

[khang_letruong]

Dear NXP Teams,

We are customizing an MX8MP based board using LAN8720A Ethernet PHY with RMII interface as below:

As I search from the BSP source code :

arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:460:#define MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC                            0x158 0x3B8 0x000 0x4 0x0
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:464:#define MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO                           0x15C 0x3BC 0x57C 0x4 0x1
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:469:#define MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0                      0x160 0x3C0 0x580 0x4 0x1
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:475:#define MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1                      0x164 0x3C4 0x584 0x4 0x1
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:480:#define MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2                      0x168 0x3C8 0x000 0x4 0x0
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:486:#define MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3                      0x16C 0x3CC 0x000 0x4 0x0
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:489:#define MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL                   0x170 0x3D0 0x588 0x4 0x1
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:492:#define MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC                       0x174 0x3D4 0x000 0x4 0x0
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:495:#define MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0                      0x178 0x3D8 0x000 0x4 0x0
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:498:#define MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1                      0x17C 0x3DC 0x000 0x4 0x0
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:501:#define MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2                      0x180 0x3E0 0x000 0x4 0x0
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:504:#define MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3                      0x184 0x3E4 0x000 0x4 0x0
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:509:#define MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL                   0x188 0x3E8 0x000 0x4 0x0
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:514:#define MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC                      0x18C 0x3EC 0x000 0x4 0x0
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:519:#define MX8MP_IOMUXC_SAI1_TXD6__ENET1_RX_ER                          0x190 0x3F0 0x58C 0x4 0x1
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:524:#define MX8MP_IOMUXC_SAI1_TXD7__ENET1_TX_ER                          0x194 0x3F4 0x000 0x4 0x0
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h:528:#define MX8MP_IOMUXC_SAI1_MCLK__ENET1_TX_CLK                         0x198 0x3F8 0x578 0x4 0x1

Aside from MDC, MDIO, TX0, TX1, RX0, RX1 and RX_ER which are evident,  I would like your confirmation about the rest : What signal between RGMII_TX_CTL and RGMII_TXC should I connect to TXEN of LAN8720A, please? Similar question to and CRS_DV of LAN8720A as well.

Thanks in advance and best regards,

Khang

[khang_letruong · Accepted solution]

Hi again,

I found necessary information from datasheet :

Thanks,

K