We are trying to get the charging unit on i.MX23 SoC to work. Principally it does its job.
The i.MX23 limits its current consumption to about 400 mA .. 500 mA from the 5V input, while the setting in the "CHARGE_4P2_ILIMIT=0x3ff" is 780 mA. The charging current for the LiPo battery "BATTCHRG_I=0x300" is set to 600 mA, but the battery does not draw this current (it only draws about 300 mA; this value is all right, because the battery is almost full).
Problem is, when the system load increases (for example playing a movie with 100 % CPU load), not the overall SoC input current increases, the battery charge current decreases instead (without changing the register settings). Note: at this point of time the temperature monitor still reports sane SoC temperatures.
Is there a know limit for the input current? I did not find any hint in the "Chip Errata for the IMX23" document.
rsc+jbe
已解决! 转到解答。
Hi Robert,
Are you setting exactly 5V on the power supply? Can you check the actual voltage on the VDD5V pin (just checking the input capacitor should be fine)? There would be quite siginifcant drop on the power cable when the large and the voltage at the MX233 would be much lower then 5V.
In addition, the HEADROOM_ADJ field on HW_POWER_5VCTRL register should be 100b as suggested by the designer.
Thanks,
Arthur
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Hi Robert,
There is no explanation for your observation now. The current on 5V should follow the CHARGE_4P2_ILIMIT setting.
Can you perform a register dump of all the PMU registers on run time for us to double check?
In addition, it may be a good idea to send us the PMU part of the schematics to double check too.
Thanks,
Arthur
Arthur, here is the register dump.
Light load:
- CPU idle
- all LEDs are off, also LCD backlight (supplied via VDDIO)
- overall current consumption 470 mA
- charging current 360 mA
Heavy load:
- CPU 100 % busy
- all LEDs are on, also the LCD backlight
- overall current consumption 440 mA
- charging current 180 mA
Mapped is the area at the physical address 0x80044000
reg
offset
00000000: 00218541 00218541 00218541 00218541 A.!.A.!.A.!.A.!.
00000010: 0003f003 0003f003 0003f003 0003f003 ................
00000020: 00000040 00000040 00000040 00000040 @...@...@...@...
00000030: 00000530 00000530 00000530 00000530 0...0...0...0...
00000040: 0022071e 0022071e 0022071e 0022071e .."..."..."...".
00000050: 0002270a 0002270a 0002270a 0002270a .'...'...'...'..
00000060: 00002614 00002614 00002614 00002614 .&...&...&...&..
00000070: 0000020c 0000020c 0000020c 0000020c ................
00000080: a0c00018 a0c00018 a0c00018 a0c00018 ................
00000090: 00000000 00000000 00000000 00000000 ................
000000a0: 0000305f 0000305f 0000305f 0000305f _0.._0.._0.._0..
000000b0: 00167021 00167021 00167021 00167021 !p..!p..!p..!p..
000000c0: 21038a2e 21038a2e 21038a2e 21038a2e ...!...!...!...!
000000d0: 00030000 00030000 00030000 00030000 ................
000000e0: 01e5060f 01e5060f 01e5060f 01e5060f ................
000000f0: 00000000 00000000 00000000 00000000 ................
00000100: 00000000 00000000 00000000 00000000 ................
00000110: 0000000e 0000000e 0000000e 0000000e ................
00000120: 00000000 00000000 00000000 00000000 ................
00000130: 03010000 03010000 03010000 03010000 ................
jbe + rsc
Hi Robert,
Are you setting exactly 5V on the power supply? Can you check the actual voltage on the VDD5V pin (just checking the input capacitor should be fine)? There would be quite siginifcant drop on the power cable when the large and the voltage at the MX233 would be much lower then 5V.
In addition, the HEADROOM_ADJ field on HW_POWER_5VCTRL register should be 100b as suggested by the designer.
Thanks,
Arthur
Hi Arthur,
The important info was to set HEADROOM_ADJ in HW_POWER_5VCTRL to 100b as suggested. This gives us significantly more than 480 mA charging current now. Additionally, the supply voltage of 5 V has indeed dropped down behind the current measurement setup. With directly feeding the 5 V into the device, there is no power drop on the cable any more and we get better results.
The helpful info was to set HEADROOM_ADJ in HW_POWER_5VCTRL to 100b as suggested. This gives us significantly more than 480 mA charging current now. However, two minor questions are still open:
a) The charging current still decreases when we create CPU load on the system. Is this expected? I would have expected that the CPU draws current from the wall plug first, before reducing the charging current.
b) The HEADROOM_ADJ bits are undocumented in the datasheet, as well as the value 100b. Do you have some information about what it means?
Btw, the original Freescale code writes 100b into a temporary variable, but forgets to write this value back into the hardware. See for example here:
http://linux-fsl-imx51.sourcearchive.com/documentation/2.6.31-605.7/ddi__power__battery_8c-source.ht... at the end of the ddi_power_Init4p2Params() function, where the value is written into the temp variable, but never written back into the hardware.
However, thanks for the help, I think the important part of the question is resolved.
Regards,
Robert
Hi Robert,
For a), what is the current you are seeing on VDD5V when the charging current starts dropping? The 785mA is just a nominal value and you may be get it in practical. You can check table 2-7 on the reference manual. The guaranteed output is 725mA minimum when VDD5V is at 5V. If the voltage is lowered than 5V, the output will be lower.
For b), there is a brief description on the reference manual. However, no detail is given as it is not suggest to tweak this parameter.
Lastly, thanks for your heads up on the code. I believe this is a software bug and I will ask the software people to follow up.
Thanks,
Arthur
Hi Robert,
The register dump looks ok.
It seems we have not ask the most basic question. Is VDD4P2 powered up properly? Have you checked the voltage? It requires a special sequence to power up.
Thanks,
Arthur
Arthur,
> The register dump looks ok.
Yes - it's basically what the Freescale driver (ported to mainline) sets up.
> It seems we have not ask the most basic question. Is VDD4P2 powered up properly?
It is, as you can see in the register dump.
> Have you checked the voltage? It requires a special sequence to power up.
The voltage is ok, and we are using the standard bootlets.
Are you sure that loading the battery with more current has ever worked?
Regards,
Robert
Hi, sorry the previous message was trimmed.
> Yes - it's basically what the Freescale driver (ported to mainline) sets up.
Have you already submitted this to mainline?
Do you have a public branch?
> Are you sure that loading the battery with more current has ever worked?
I'm using an i.MX28 based board (not an i.MX23) and I have been able to load the
battery at full 780mA.
My board consumes around 320mA from wall 5V when the charger is disabled.
With the CHARGE_4P2_ILIMIT set to 600mA I saw comsumption of up to ~800mA.
When I set the CHARGE_4P2_ILIMIT to 780mA comsumption rose up to ~940mA.
This was done with a battery that was quite discharged (around 3.6V). Could it be that your battery
is in a good charge state? As the voltage increases, the current flow into the battery
drops down, so changes on the limit field won't give you more current than what the
battery accepts.
Best regards,
--
Hector Palacios
Hi Arthur,
On Tue, Oct 01, 2013 at 09:27:07PM -0700, Ming On Lai wrote:
> Can you check the HW_POWER_DCDC4P2 register? There are settings which
> governs behaviour of the PMU on DCDC4P2 and DCDC_BATT.
In the HW_POWER_DCDC4P2 register we have:
DROPOUT_CTRL: the FSL battery charger driver sets the
BF_POWER_DCDC4P2_DROPOUT_CTRL(0xa) which means
100 mV drop and "DCDC converter selects VDD4P2 or
battery which ever is higher"
This could explain why an increasing CPU load steals battery charging current,
but not why the PMIC doesn't increase its input current from the main 5V
input.
When setting the current limit in CHARGE_4P2_ILIMIT to 780 mA, I would expect
the current on the main 5 V supply to increase up to this limit and *then* the
PMIC should start to steal battery charge current - right?
Instead I see the opposite:
5V main CPU load charger
current current
500 mA idle 270 mA
490 mA light 200 mA
460 mA full 60 mA
It seems the 4P2 regulator does not use the remaining 280 mA allowed by the
CHARGE_4P2_ILIMIT.
rsc
Hi Robert,
I have similar behavior here. Our iMX233 board currently needs 60 mA idle and it goes up to 110 mA playing (loud) over an external speaker.
During charging the current drawn from the charger is limited to ~500mA, regardless if I play music or not. As you I've set the iLimits to maximum value.
The whole PMU and charger stuff is set up by myself not using default stub-lets or Linux kernel.
I would appreciate if Freescale can post the setup code which does the trick beyond 500mA.
Unless someone reports successfully breaking the 500mA barrier I assume there is no way to go beyond ~500mA.
Thanks
Mike
HI Robert,
Due Holidays in China, arthur_lai is out this week. He can continue with the follow up next week.
The 5V input is used as the supply for the battery battery and as system supply as the same time (5V is regulated to 4.2V on VDD4P2 to power the on-chip DCDC).
The total current from 5V is controlled by CHARGE_4P2_ILIMIT. So, the CHARGE_4P2_ILIMIT controls total current taken by the battery charger and the system. In addition, in order to ensure the i.MX233 running properly, the PMU has a feature that provide higher priority to the VDD4P2. Current on the battery charger will be reduced when total current consumed on VDD4P2 and battery charger exceed the current set by CHARGE_4P2_ILIMIT. So, your observation is expected.
For more detail, please refer to Figure 32-1, section 32.6, and register description of CHARGE_4P2_ILIMIT bist on the reference manual.
Thanks,
Arthur
arthur_lai can you continue with the follow up on this case?
Hi Arthur,
Please re-read my original posting. Our understanding is that setting CHARGE_4P2_ILIMIT=0x3ff should limit the total (CPU+Charger) current to 780 mA.
In fact, we are only observing 500 mA total current on the 5 V supply rail.
Regards,
Robert