MCIMX6Q5EYM10AE Secure boot config

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MCIMX6Q5EYM10AE Secure boot config

828 次查看
RamakrishnaC
Contributor III

Hi Team,

Regarding MCIMX6Q5EYM10AE, How to impletement the secure Boot configuration and related to hardware do we need any additional components for secure Boot configuration. Please share more details on this topic.

and share the refrence design too.

Thank you

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585 次查看
RamakrishnaC
Contributor III

Hi,

Thank you.

Could you please share more details why this circuit?

 

RamakrishnaC_0-1720010390100.png

 

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Harvey021
NXP TechSupport
NXP TechSupport

Regarding the circuit, I have less knowledge about it. Would recommend that you create a new case for the new question. Other engineers may help you with more details. However, to this boot configuration, the boot circuit is that the pin of the boot cfg latches the value of the boot cfg at the last clk cycle before the POR is released. The ROM will then read the value of this register. 

Regarding the security issue, like volatile key. Already replied to you in another email.

 

Regards

Harvey

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799 次查看
Harvey021
NXP TechSupport
NXP TechSupport

Hi 

You can refer to the habv4,  and AN4581, and SRM IMX6DQ6SDLSRM 

 

Regards

Harvey

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RamakrishnaC
Contributor III

Hi,

Thank you.

What is the volatile keys and non-volatile secure keys & what is the difference?

Do we need any hardware parts required to config the volatile keys and non-volatile secure keys?

Please confirm and share any refernce.

 

 

 

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796 次查看
RamakrishnaC
Contributor III

Hi Harvey,

Thanks for the details.

Could you please share the scheamtic related hardware parts related to secure boot configuration examples?

Thanks & Regards,

Ram

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Harvey021
NXP TechSupport
NXP TechSupport

You can refer to the schematics if any from i.MX6Q 

 

Regards

Harvey

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724 次查看
RamakrishnaC
Contributor III

Hi Harvey,

Thank you.

What is the Boot Mode 0&1 setting required for booting from NOR Flash ?

FYI, NOR flash is on D0 to D15 EIM bus & using CS0.

Please share the details.

Thank you.

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