Looking for documentation of the BOOT_CFG pins in Internal Boot mode

[wad1]

I'm looking for documentation of the BOOT_CFG[] pins on the iMX7 Solo and Dual.   The data sheet and hardware development guide both say that the reference manual has the information, but the iMX7 Dual Reference Manual (Rev. 0.1, 08/2016) has no information other than a note in Table 6-25 that BOOT_CFG[18:0] have settings that depend on the boot mode (but aren't defined in the Boot Mode sections).

Table 6-25 lists some fuses (e.g. DISABLE_SDMMC_MFG) as being over-riden by GPIO pins, but doesn't list the equivalent GPIO.   Some fuses have equivalent BOOT_CFG pins defined, but most BOOT_CFG pins are not defined in the table.

Can NXP please provide a list of the functions performed by each BOOT_CFG pin, in Internal Boot mode ?

Thanks,

John

[CarlosCasillas · Accepted solution]

Hi John,

Regarding boot configurations for the i.MX7, the BOOT_MODE[1:0] define if the processor will boot from fuses [0:0], or from serial downloader [0:1], or from internal [1:0]. It is mentioned on Table 6-24 “Boot MODE Pin Settings” of the i.MX7 Reference Manual:

So, for using GPIO overriding for selecting the external boot device, the BT_CFG[19:0] configuration are considered (pins LCD1_DATA [19:0]) mentioned on Table 94 “Fuses and associated pins used for boot” of the i.MX7 Datasheet. Additionally, you should also refer to Table 6-25 “Boot eFUSE Descriptions”, Table 6-26 “GPIO Override Contact Assignments” and section 6.6.5 “Boot Devices (Internal Boot)” of the i.MX7 Reference Manual.

Hope this will be useful for you.
Best regards!
/Carlos
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[wad1]

You definitely answered my original question.

I'm not sure if my second question (is there any way that boot will test a sequence of boot devices ?) was answered.

Let's assume BOOT_MODE=0 (Boot from Fuses), and ignore GPIOs.  Is there any way to specify that a sequence of Boot Devices should be used (say "NAND/SD1/SD2/SD3/QSPI1/SPI1/USB downloader", like a competitor's SoC).  I understand the desire to lock to a particular boot device in secure boot situations, and also appreciate the "SPI Recovery Mode", but ask if a more generic case is provided.

[wad1]

The note in Table 6-25 should say that the definition of BOOT_CFG pins 11-0 depend on the boot DEVICE.  Their function changes depending on the settings of BOOT_CFG bits 15-12 (defined in Table 6-33 at the start of Boot Devices), which select a boot device.   Look in the Boot Devices sections to find the additional definitions.

This question now changes slightly.   I expected that the iMX7 would support a chained boot process, where it sequences through possible boot devices and selects the first which provides a valid DCD.   Given the BOOT_CFG over-ride definitions, this doesn't seem possible.   Is there another setting for BOOT_CFG[15:12] (such as 0000) which tells the iMX7 to sequence through boot devices, or is it limited to booting from a single device (with the exceptions of USB download or SPI recovery modes) ?