Imx8mq custom board 4G LPDDR4 with 4.14.98.2.0.0_ga doe it need any update in ATF

[agnel_terry]

Hi ,

In our custom board we updated the DDR from 3GB to 4GB, we ran DDR stress test and we created new lpDDR4 timing file and updated it in the U-boot, and the required changes in U-boot and kernel for the DDR is done , is there any other updates need to be done in ATF for the DDR updates.

Other than DDR is the any Power Domain driver change we need to take care for custom board , we use 4.14.98.2.0.0_GA version

Thanks and Regards

Terry

[joanxie]

for ATF, restore optee trust zone configuration from DSM(system suspend), pls refer to the patch as below

diff --git a/plat/imx/imx8mm/gpc.c b/plat/imx/imx8mm/gpc.c
index afbb7b9c..39eac4e6 100644
--- a/plat/imx/imx8mm/gpc.c
+++ b/plat/imx/imx8mm/gpc.c
@@ -571,6 +571,14 @@ void imx_anamix_post_resume(void)
#define GPR_TZASC_EN (1 << 0)
#define GPR_TZASC_EN_LOCK (1 << 16)

+#define CFG_TEE_RESERVED_SIZE 0x02000000
+
+#define CFG_SHMEM_SIZE 0x100000
+
+#define CFG_TZDRAM_SIZE (CFG_TEE_RESERVED_SIZE - CFG_SHMEM_SIZE)
+
+#define CFG_SHMEM_START (BL32_BASE + CFG_TZDRAM_SIZE)
+
static void imx8mm_tz380_init(void)
{
unsigned int val;
@@ -581,8 +589,27 @@ static void imx8mm_tz380_init(void)

tzc380_init(IMX_TZASC_BASE);

- /* Enable 1G-5G S/NS RW */
- tzc380_configure_region(0, 0x00000000, TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_4G) | TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_ALL);
+ tzc380_configure_region(1, 0x00000000,
+ TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_8G) |
+ TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_NS_RW);
+
+ tzc380_configure_region(2, (BL32_BASE - IMX_DDR_BASE),
+ TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_32M) |
+ TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_S_RW);
+ tzc380_configure_region(3, (CFG_SHMEM_START - IMX_DDR_BASE),
+ TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_4M) |
+ TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_ALL);
+
+#ifdef CFG_DRM_SECURE_DATA_PATH
+ tzc380_configure_region(4, CFG_TEE_SDP_MEM_BASE - IMX_DDR_BASE,
+ TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_32M) |
+ TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_ALL);
+ /* Decoded buffer size is 128MB */
+ tzc380_configure_region(5, CFG_RDC_DECODED_BUFFER - IMX_DDR_BASE,
+ TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_128M) |
+ TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_ALL);
+#endif
+
}

void noc_wrapper_pre_suspend(unsigned int proc_num)
diff --git a/plat/imx/imx8mm/include/platform_def.h b/plat/imx/imx8mm/include/platform_def.h
index 6e1339a5..13fa37cf 100644
--- a/plat/imx/imx8mm/include/platform_def.h
+++ b/plat/imx/imx8mm/include/platform_def.h
@@ -28,6 +28,8 @@
#define PLAT_WAIT_RET_STATE 1
#define PLAT_STOP_OFF_STATE 3

+#define IMX_DDR_BASE 0x40000000
+
#define BL31_BASE 0x920000
#define BL31_LIMIT 0x940000
#define BL32_BASE 0xbe000000

[agnel_terry]

Hi ,

My custom board uses IMX8MQ, the patch you provided is for IMX8MM, is there a separate patch for IMX8MQ ?

Please advice

Thanks and Regards

Terry

[joanxie]

no special ATF code for imx8mq, but it should be similar, customer can modify by themselves according to this patch