IMX8QXP LPDDR4 Training errors / boot issues on some products

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IMX8QXP LPDDR4 Training errors / boot issues on some products

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r_veens
Contributor III

Hello,

We are experiencing issues during startup during training of the LPDDR4 on some of our IMX8QXP-based products.

The products reboot a few times during startup (found by measuring the reset pin), before being able to continue to the SCFW/UBoot.

The problem also manifests itself when using the MFG/UUU tool.
Multiple reboots/attempts are needed to get the UUU to go past an initial LIBUSB IO error at 18%.

r_veens_0-1696588475353.png

DDR stress tool:
- All the products with boot issues also show to have training errors.
- Some of the faulty products only show to have training errors on some boot attempts. While others always show a training error on every boot.
- Once the DDR stress test tool gets past the initial training/startup, running the stress test does not show errors.
- The training errors show up on DDR stress test tool version ER14 and ER15.
- The training errors show up with the default SCFW binary in the stress test tool (mx8qxb0_scfw_download.bin), as well as the SCFW binary that we have compiled ourselves.


Some information about our implementation:
- MIMX8QX6AVLFZAC (c0 revision)
- SCUFW 1.15.0
- LPDDR4: Nanya (4GB) NT6AN1024F32AV-J2
- DDR config used: Copy of reference MX8QXP_C0_B0_LPDDR4_RPA_1.2GHz_v16 (MEK/Micron MT53B768M32D4) + density changed from 6Gb to 8Gb.
- Boot medium: eMMC
- We have chosen to set the fuse WDOG_ENABLE with WDOG_TIMEOUT_SELECT to 2 seconds in order to enable the SCU ROM WDOG. Perhaps this might be related.
- Linux BSP based on NXP release version 5.15.32-2.0.0

We are concerned that these issues may manifest itself over time during the life-time of the product, and eventually making the product not boot at all.

We are unsure if the issue is related to:
- hardware issues
- component tolerances
- the DDR config not covering all possible boards.

At this point we have a few questions:
- Which register settings in the excel sheet RPA could we try to change in order to make the training at boot time more reliable?
- Are there any steps we could do on the hardware in order to verify its correctness?

Please see the attachments for startup-logs of the DDR stress test tool.
Test have been performed on four products:
- DUT1: known boot issues. Stress test tool does not shows training errors on every boot.
- DUT2: known boot issues. Stress test tool shows training errors on every boot.
- DUT3: no known boot issues. No training errors in stress test tool.
- DUT4: no known boot issues. No training errors in stress test tool.

 

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5 Replies

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riteshmpatel
NXP TechSupport
NXP TechSupport

Hi @r_veens,

I hope you are doing well.
Please accept my apologies for the delay in response.

I suggest referring to some suggestions described in the below links regarding "uuu tools", and "MfgTool", It may be helpful.
https://community.nxp.com/t5/i-MX-Processors/IMX8QM-uuu-u-boot-Failed/m-p/832859
https://community.nxp.com/t5/i-MX-Processors/imx8qxp-mek-uuu-fail/m-p/993787

One can also refer to the below-given link below.
https://community.nxp.com/t5/i-MX-Processors/DDR-stress-test-on-IMX8QXP-custom-board-and-Evaluation-...

I hope it helps!

Thanks & Regards,
Ritesh M Patel

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r_veens
Contributor III

Hi Ritesh ,

Thank you for responding to my post.

I tried to look at your suggested posts, however they do not provide a solution. Some of them i already found on my own.

https://community.nxp.com/t5/i-MX-Processors/IMX8QM-uuu-u-boot-Failed/m-p/832859 
Suggests to run UUU as admin, which i already tried and this did not work. The post is for a dev kit and some people were using the wrong files.

https://community.nxp.com/t5/i-MX-Processors/imx8qxp-mek-uuu-fail/m-p/993787
User is also using a dev kit. They compiled a wrong flash.bin with some files missing . 

https://community.nxp.com/t5/i-MX-Processors/DDR-stress-test-on-IMX8QXP-custom-board-and-Evaluation-...
Person here also has a issue with the DDR test tool, just like us. They are using the same LPDDR4 as in the MEK. 
We are using a different DDR compared to the MEK, so we have a different situation. 

 

This week we removed the function pmic_update_timing from the board.c file in the SCFW. And we found that the UUU tool no longer gives the error after the second try. Perhaps the issue is related to power-up sequence?

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riteshmpatel
NXP TechSupport
NXP TechSupport

Hi @r_veens,

The pmic_update_timing just updates power timing for PMIC.

If it seems power-up sequence-related issue, one can refer to the power-up sequence by referring to the below document.
https://www.nxp.com/docs/en/data-sheet/PF4210.pdf?_gl=1*f7b7gr*_ga*MTAzMDE0OTEzNy4xNjk3MTY5OTM4*_ga_.....

I'm glad that the issue is resolved.

Thanks & Regards,
Ritesh M Patel

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r_veens
Contributor III

Hi Ritesh,

The issue is not resolved, the error still occurs. We would like to know why the error occurs.

Could you please answer the questions in the original post, thanks. 

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riteshmpatel
NXP TechSupport
NXP TechSupport

Hi @r_veens,

For a new board or memory, it is necessary to follow the steps described in "How to bring up a new MX8MSCALE board" in MX8_DDR_Tool_User_Guide.pdf
Please make sure the above step is followed.

Please also refer to the notes given in section i.MX 8/8X DDR Register Programming Aid (RPA): Current Versions from the below link.
https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8-8X-Family-DDR-Tools-Release/ta-p/...

I hope it helps!

Thanks & Regards,
Ritesh M Patel

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