Hi NXP community,
I've been facing an issue integrating an IMX378 image sensor with an IMX8MQ when configured for MIPI-CSI over 2 lanes at 1920x1080p @ 80fps. Note that the IMX378 provides progressive video, not interlaced. The kernel being used is linux-imx-4.14.98 and the IMX8 reference manual being referred to is Rev 3 04/2020: IMX8M Reference Manual .
The issue seems to occur quite randomly - 50% of the time, I boot and I'm able to stream video successfully with the correct fps. If it works on first boot, then it will continue to work as I stop and start streaming again. However, the other 50% of the time, I am faced with the "Base address switching change error", which persists when attempting to stop and start streaming again. The only way to resolve this is to reboot and hope that it boots in a good state. This is extremely unreliable and I'm in need of a fix!
I've seen that a lot of the community have faced similar issues and have tried various suggestions. See below;
if (pix->field == V4L2_FIELD_INTERLACED) csi_tvdec_enable(csi_dev, true); + else + csi_tvdec_enable(csi_dev, false);
assigned-clock-rates = <266000000>, <333000000>, <133000000>;
I had a look at the CSI register values to see if anything stood out when starting the stream. Here is the output;
[ 77.614214] CSI_CSICR1: 0x11f0902 [ 77.617538] CSI_CSICR2: 0xc0000000 [ 77.621067] CSI_CSICR3: 0x10a0 [ 77.624257] CSI_STATFIFO: 0x26b026aa [ 77.627960] CSI_CSIRXFIFO: 0x211a2221 [ 77.631922] CSI_CSIRXCNT: 0x9600 [ 77.635266] CSI_CSISR: 0x92224001 [ 77.638695] CSI_CSIDBG: 0x0 [ 77.641487] CSI_CSIDMASA_STATFIFO: 0x0 [ 77.645350] CSI_CSIDMATS_STATFIFO: 0x0 [ 77.649214] CSI_CSIDMASA_FB1: 0xc4100000 [ 77.653311] CSI_CSIDMASA_FB2: 0xc4300000 [ 77.657348] CSI_CSIFBUF_PARA: 0x0 [ 77.660777] CSI_CSIIMAG_PARA: 0x7800438 [ 77.664787] CSI_CSICR18: 0xd44ad030 [ 77.668389] CSI_CSICR19: 0x2d
Here we can see that the RXFIFO does have data present, so not sure what the issue is.
I have also seen suggestions to upgrade to the latest kernel (linux-imx-5.4.47) - I had a look at the source code for the relevant IMX8MQ drivers (mx6s_capture.c and mxc-mipi-csi2_yav.c). I didn't see any significant register configuration changes so I don't think this will help.
Does anyone have any ideas on how to finally solve this issue? any help would be appreciated! Thank you.