IMX7D PCIE Control Register Access Failure

[christsang]

Hi all,

I am working on PCIE support on my custom board. I raised a question before IMX7D PCIE Support . But this time I am going to provide more details.

As I am going to enable PCIE support for IMX7D, I have enabled following kernel options.

CONFIG_PCI=y
CONFIG_PCI_MSI=y
CONFIG_PCI_IMX6=y

CONFIG_BLK_DEV_NVME=y‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

After that I have also enable the PCIE in device tree.

&pcie {
     pinctrl-names = "default";
     pinctrl-0 = <&pinctrl_pcie>;
     reset-gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
     disable-gpio = <&gpio1 12 GPIO_ACTIVE_LOW>;
     status = "okay";
};‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

After that, the kernel stuck at

Starting kernel ...

Uncompressing Linux... done, booting the kernel.

I finally trace the cause is here in pcie-designware.c

void dw_pcie_setup_rc(struct pcie_port *pp)
{
 return;
 u32 val;
/* set the number of lanes */
 val = dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL);
 val &= ~PORT_LINK_MODE_MASK;
 switch (pp->lanes) {
 case 1:
 val |= PORT_LINK_MODE_1_LANES;
 break;‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

The dw_pcie_readl_rc() function cannot proceed and the kernel fails to respond.

This issue only happens on my custom board but not on IMX7D sabre board.

I tried to manually read the register instead, in both kernel and uboot. Both of them fail to respond and keep stuck at that moment. Even CTRL-C cannot escape that condition

Kernel:

memtool md -l 0x33800710 1‍‍‍‍‍

Uboot

md.l 0x33800710 1‍‍‍‍‍

This register seems to be able to access using certain method. 

Please advise. Thanks.

Chris Tsang

[igorpadykov · Accepted solution]

Hi Chris

one can check if pcie clocks are enabled in CCM_CCGR96 register

(Table 5-19. CCGR Mapping Table i.MX7D Reference Manual) and PCIe

voltage rails using Hardware Development Guide for i.MX7Dual and 7Solo Applications Processors
http://www.nxp.com/files/32bit/doc/user_guide/IMX7DSHDG.pdf.

Try with nxp linux :

linux-imx - i.MX Linux kernel 

Best regards
igor
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[christsang]

Hi Igor,

Thanks for your reply. The register value is 0x0 in uboot and 0x3 in kernel. The clock is enabled in kernel.

I am going to check the PCIE voltage rail next.

Chris

[christsang]

This issue is due to the PCIE_VP and PCIE_VPH connections. They are all connected to ground.