Hey everyone ,
I have questions about the IMX6dualite component to lower the core frequency to 396MHz .
According to the AN4576, I can operate at a frequency of 396MHz. For that it would be necessary that VDD_ARM_CAP is a voltage at 0.95V and VDD_SOC_CAP/VDD_PU_CAP is at 1.175V.
From what I understand, the voltages VDD_ARM_CAP, VDD_SOC_CAP & VDD_PU_CAP are provided internally and that an external power supply is provided on VDD_ARM_IN and VDD_SOC_IN.
How can I achieve this wiring to reach the 396MHz frequency?
Thank you for your help,
Regards
Roger Crane / Junior System Engineer
Solved! Go to Solution.
NXP linux BSP already enable DVFS.
You can use userspace governor in userspace to force the frequency including 396M.
And operation points set in dts
lf-5.10.35-2.0.0\linux-imx\arch\arm\boot\dts\imx6dl.dtsi
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
operating-points = <
/* kHz uV */
996000 1250000
792000 1175000
396000 1150000
>;
fsl,soc-operating-points = <
/* ARM kHz SOC-PU uV */
996000 1175000
792000 1175000
396000 1175000
>;
Hello BiyongSUN,
thank you for your feedback.
Your answer was very helpful.
Regards,
Roger_C
NXP linux BSP already enable DVFS.
You can use userspace governor in userspace to force the frequency including 396M.
And operation points set in dts
lf-5.10.35-2.0.0\linux-imx\arch\arm\boot\dts\imx6dl.dtsi
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
operating-points = <
/* kHz uV */
996000 1250000
792000 1175000
396000 1150000
>;
fsl,soc-operating-points = <
/* ARM kHz SOC-PU uV */
996000 1175000
792000 1175000
396000 1175000
>;