How to support 4G DDR and use Windows 10 IoT on i.MX8M PLUS platform

[ivychend]

Hi all! We using W21H2-1-5-0-imx-windows-bsp to build BSP firmware, and burn to emmc on our custom board, u-boot is running normally. However, win-pe failed to install the image correctly and crashed, I suspect it's ddr, but I don't know how to make imx8mp support 4G ddr. Please help me. Thank you very much.

Our DDR datasheet:

log:

U-Boot SPL 2022.04-00001-gab1d7424f6-dirty (May 08 2024 - 16:29:53 +0800)

DDRINFO: start DRAM init

DDRINFO: DRAM rate 3200MTS

DDRINFO:ddrphy calibration done

DDRINFO: ddrmix config done

SEC0:  RNG instantiated

Normal Boot

Trying to boot from BOOTROM

Boot Stage: Primary boot

image offset 0x0, pagesize 0x200, ivt offset 0x0

NOTICE:  BL31: v2.6(release):automotive-13.0.0_1.1.0-1-g4d39d5d54

NOTICE:  BL31: Built : 16:30:19, May  8 2024

U-Boot 2022.04-00001-gab1d7424f6-dirty (May 08 2024 - 16:29:53 +0800)

CPU:   i.MX8MP[8] rev1.1 1600 MHz (running at 1200 MHz)

CPU:   Industrial temperature grade (-40C to 105C) at 66C

Reset cause: POR

Model: NXP i.MX8MPlus LPDDR4 EVK board

DRAM: 4 GiB

Core:  93 devices, 29 uclasses, devicetree: separate

MMC:   FSL_SDHC: 1, FSL_SDHC: 2

Loading Environment from MMC... *** Warning - bad CRC, using default environment

[*]-Video Link 0adv7535_mipi2hdmi adv7535@3d: Can't find cec device id=0x3c

fail to probe panel device adv7535@3d

fail to get display timings

probe video device failed, ret -19

[0] lcd-controller@32e80000, video

[1] mipi_dsi@32e60000, video_bridge

[2] adv7535@3d, panel

adv7535_mipi2hdmi adv7535@3d: Can't find cec device id=0x3c

fail to probe panel device adv7535@3d

fail to get display timings

probe video device failed, ret -19

In:    serial

Out:   serial

Err:   serial

SEC0:  RNG instantiated

 BuildInfo:

  - ATF 4d39d5d

switch to partitions #0, OK

mmc2(part 0) is current device

flash target is MMC:2

Net:   

Warning: ethernet@30bf0000 (eth1) using random MAC address - c6:73:ce:f6:60:48

Warning: ethernet@30be0000 (eth0) using random MAC address - 2e:23:9a:c1:2d:c9

eth0: ethernet@30be0000, eth1: ethernet@30bf0000 [PRIME]

Fastboot: Normal

Normal Boot

starting USB...

Bus usb@38100000: Register 2000140 NbrPorts 2

Starting the controller

USB XHCI 1.10

Bus usb@38200000: Register 2000140 NbrPorts 2

Starting the controller

USB XHCI 1.10

scanning bus usb@38100000 for devices... 1 USB Device(s) found

scanning bus usb@38200000 for devices... 1 USB Device(s) found

       scanning usb for storage devices... 0 Storage Device(s) found

## Loading kernel from FIT Image at 40480000 ...

   Using 'conf-1' configuration

   Verifying Hash Integrity ... OK

   Trying 'uefi' kernel subimage

     Description:  UEFI

     Created:      2024-05-08   8:33:41 UTC

     Type:         Kernel Image

     Compression:  gzip compressed

     Data Start:   0x404800a4

     Data Size:    852971 Bytes = 833 KiB

     Architecture: AArch64

     OS:           Linux

     Load Address: 0x50004000

     Entry Point:  0x50004000

     Hash algo:    sha256

     Hash value:   dae5ca3b766395df87b35985ed6df87e02a4bf2ddd60db9e40b6b6bb97e6feaf

   Verifying Hash Integrity ... sha256+ OK

   Uncompressing Kernel Image

adv7535_mipi2hdmi adv7535@3d: Can't find cec device id=0x3c

fail to probe panel device adv7535@3d

fail to get display timings

probe video device failed, ret -19

Starting kernel ...

UEFI Debug Serial Port Init

UEFI firmware (version 2023-10-21 built at 16:32:36 on May  8 2024)

iMX8RTC Initialized with sample time 1.7.2023 9:00:00 UTC, DST.

Tianocore/EDK2 firmware version 2023-10-21

Press ESCAPE for boot options **  WARNING: Test Key is used.  **

Then win-PE  crashed:

[aber]

Hi ivychend

   Has the problem been resolved? I am also facing the same problem here. Modifying DDR according to the patch has no effect。

[jakub_zigacek]

Hi @ivychend,

the RAM available for windows is configured in the file mu_platform_nxp/NXP/MX8M_PLUS_EVK/MX8M_PLUS_EVK.dsc. To change RAM size from 6GB set for EVK to 4GB, you need to change this line:

giMX8TokenSpaceGuid.PcdBank1MemorySize|0x00000000C0000000

to

giMX8TokenSpaceGuid.PcdBank1MemorySize|0x0000000040000000

And to see correct value in task manager, it has to be also adjusted in mu_platform_nxp/NXP/MX8M_PLUS_EVK/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c in tabels mArmDefaultType16 and mArmDefaultType17.

Best Regards, Jakub

[ivychend]

Thank you for your reply，but I've already made some changes,please look at this diff info.

git diff mu_platform_nxp/NXP/MX8M_PLUS_EVK/
diff --git a/mu_platform_nxp/NXP/MX8M_PLUS_EVK/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c b/mu_platform_nxp/NXP/MX8M_PLUS_EVK/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index f9ddadb..0aca646 100644
--- a/mu_platform_nxp/NXP/MX8M_PLUS_EVK/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/mu_platform_nxp/NXP/MX8M_PLUS_EVK/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -412,7 +412,8 @@ STATIC CONST ARM_TYPE16 mArmDefaultType16 = {
MemoryArrayLocationSystemBoard, //on motherboard
MemoryArrayUseSystemMemory, //system RAM
MemoryErrorCorrectionNone,
- 0x2000000, //8GB
+ //0x2000000, //8GB
+ 0x1000000, //4GB
0xFFFE, //No error information structure
0x1, //soldered memory
},
@@ -431,7 +432,8 @@ STATIC CONST ARM_TYPE17 mArmDefaultType17 = {
0xFFFE, //no errors
0xFFFF, // unknown total width
0xFFFF, // unknown data width
- 0x1800, // 6GB
+ //0x1800, // 6GB
+ 0x1000, //4GB
0x05, // Chip
0, //not part of a set
1, //Device locator
diff --git a/mu_platform_nxp/NXP/MX8M_PLUS_EVK/MX8M_PLUS_EVK.dsc b/mu_platform_nxp/NXP/MX8M_PLUS_EVK/MX8M_PLUS_EVK.dsc
index 05e9358..30ffb5b 100644
--- a/mu_platform_nxp/NXP/MX8M_PLUS_EVK/MX8M_PLUS_EVK.dsc
+++ b/mu_platform_nxp/NXP/MX8M_PLUS_EVK/MX8M_PLUS_EVK.dsc
@@ -170,14 +170,15 @@
gArmTokenSpaceGuid.PcdSystemMemorySize|0xB1F00000
!endif
!else
- gArmTokenSpaceGuid.PcdSystemMemorySize|0xC0000000
+ #gArmTokenSpaceGuid.PcdSystemMemorySize|0xC0000000
+ gArmTokenSpaceGuid.PcdSystemMemorySize|0x80000000
!endif

# 3GB in the 5GB bank of memory above 32 bit address space
giMX8TokenSpaceGuid.PcdBank1MemoryBase|0x0000000100000000
#TODO: se the "Bank1 Size" to 4G to enable RAM above 4G, USB is not working with upper RAM
- giMX8TokenSpaceGuid.PcdBank1MemorySize|0x00000000C0000000
-# giMX8TokenSpaceGuid.PcdBank1MemorySize|0x000000000000000
+# giMX8TokenSpaceGuid.PcdBank1MemorySize|0x00000000C0000000
+ giMX8TokenSpaceGuid.PcdBank1MemorySize|0x0000000040000000

# GOP driver memory
!if $(CONFIG_HEADLESS) == TRUE

The problem still exist, is there anything else that needs to be revised? Thank you again.

[jakub_zigacek]

Hi @ivychend,

1/ just to be sure, do you have correct DDR timing file prepared for your custom board?
For 4GB you need a different timing file than the one which is in the BSP. We have a tool for that - put the data according to the datasheet and it generates the timing file:
https://www.nxp.com/design/design-center/development-boards/i-mx-evaluation-and-development-boards/c...
User's Guide is included.

2/ Please leave PcdSystemMemorySize as it is in BSP with value 0xC0000000, which means 3GB. We have tested 4GB DDR with this setting in configuration 3GB PcdSystemMemorySize + 1GB PcdBank1MemorySize.

By setting the PcdSystemMemorySize to 2GB, the areas with GPU and Trust zone memory will find itself out of the System Memory, which is not correct. You can check the Mini or Nano dsc file, there you can see, that for 2GB DDR, the addresses of GPU and Trust zone areas are shifted 1GB down to fit in  the Windows System memory.

Best Regards, Jakub

[ivychend]

Thank you, jakub_zigacek,

Yes, my DDR timing file is confirmed to be normal because this file works properly on the Yocto SDK. According to your reply, I have reverted the value of PcdSystemMemorySize to the default, but the issue remains the same. Have you had the chance to review my DDR datasheet? My DDR is different from your default DDR and is quite special as it has four channels. Could any targeted modifications be necessary

[jakub_zigacek]

Hi @ivychend,

two rank and two channel LPDDR4 should work with i.MX8M Plus:

When one is not sure if memory is working correctly, u-boot md command can be used from u-boot shell. E.g. :
usb start; fatload usb 0:1 0x0000000100000000 some_file_one_USB_stick.bin ; md 0x0000000100000000

it will start USB, read file from USB to memory location given by address, and then it will show content of target memory location with md command.

Or Memtest86+ arm64 variant can be use, please check: https://community.nxp.com/t5/i-MX-Processors/Cannot-boot-into-WinPe-for-Windows-10-IoT/m-p/1717890/h...

A have attached patch for BSP 1.4.1 for MP with 4GB. It has only changes needed for Windows, DDR timing file is not changed, as it is only for demonstration with EVK.

I have also once did that error, that I was not building firmware with -c argument and only built changed files. I have copied timing file for different DDR into existing and previously build project folder and did not notice, that it's file date is older than my last time of build. That way I had the correct timing file in project, but it was not used for build.

Best Regards, Jakub