Hi he
please check sect.5.5 Audio Playback AN4509 i.MX 6Dual/6Quad Power
Consumption Measurement
https://cache.freescale.com/files/32bit/doc/app_note/AN4509.pdf
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Hi he
please check sect.5.5 Audio Playback AN4509 i.MX 6Dual/6Quad Power
Consumption Measurement
https://cache.freescale.com/files/32bit/doc/app_note/AN4509.pdf
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
I want to know the optimizations such as
Apply clock gating whenever clocks or modules are not used, by configuring CCGR registers in
the CCM (Clock Controller Module).
Reduce the number of operating PLLs—Applicable mainly in Audio Playback mode or Idle
modes.
DDR interface optimization:
...........
Are these optimizations contained in the current bsp or not? If not ,can we do the job by ourself?
you can implement job by yourself or apply to NXP Professional Services:
http://www.nxp.com/support/nxp-professional-services:PROFESSIONAL-SERVICE
Pro-Support contact www.nxp.com/prosupport
Best regards
igor
Do you mean we need to do the job by ourself? Further optimizations can be done on individual customer’s
system.Such as
Apply clock gating whenever clocks or modules are not used, by configuring CCGR registers in
the CCM (Clock Controller Module).
Reduce the number of operating PLLs—Applicable mainly in Audio Playback mode or Idle
modes.
DDR interface optimization:
...........