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jeanletutour 24 févr. 2014 00:44
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Hello ,
i am trying to increase memory DDR2 from 128 MB to 256 MB
I took a DDR2 Micron MT47H128M16 with the driver of MT47H64M16
I see the 256 MB RAM as 128MB in the kernell
i tried to change kernel boot parameters with mem=256Min kernell command line , but with the kernell does not boot any more.
do you know what to do?
Thanks in advance
已解决! 转到解答。
You can find i.MX28 memory test in the post
https://community.freescale.com/message/374833#374833
Grace
If you use bootlet+ kernel, the SDRAM ram size is defined in
imx-bootlets-src-2.6.35.3-1.1.0/linux_prep/include/mx28/platform.h
#define SDRAM_SIZE 0x08000000
It is passed to kernel with ATAG_MEM.
If you use u-boot, the SDRAM ram size is defined in
u-boot-2009.08/include/configs/mx28_evk.h
#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
It is passed to kernel with ATAG_MEM.
Grace
Hi Grace ,
Thanks for your answer which works partially .
with my MT47H128M16 (256M DDR2) , if i put #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ it s OK
, if i put #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */ Kernerl does not boot
Since i am using MT47H128M16 driver , i suspect that this is because MSB for address is not driven
dont you have any tip on the subject ?
thanks in advance .
Jean
Hi Grace
i changed HW_DRAM_CTL29 to 0x0f02020a. It works better, but not totally
here is what i see at the boot
ÿøüHTLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLFLC
PowerPrep start initialize power...
Battery Voltage = 1.04V
No battery or bad battery detected!!!.Disabling battery voltage measurements./r/nLLLCMar 17 201408:23:53
FRAC 0x92925552
memory type is DDR2
Wait for ddr ready 1power 0x00820710
Frac 0x92925552
start change cpu freq
hbus 0x00000003
cpu 0x00010001
LLLLLLLFLCLLJUncompressing Linux... done, booting the kernel.
Linux version 2.6.35.3-670-g914558e (madfsl@ubuntu) (gcc version 4.4.4 (4.4.4_09.06.2010) ) #27 PREEMPT Mon Mar 17 08:22:36 CET 2014
CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
CPU: VIVT data cache, VIVT instruction cache
Machine: Freescale MX28EVK board
Memory policy: ECC disabled, Data cache writeback
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024
Kernel command line: -e noinitrd console=ttyAM0,115200 root=/dev/mmcblk0p3 rw rootwait fec_mac=00:1A:25:00:00:00 gpmi
PID hash table entries: 1024 (order: 0, 4096 bytes)
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Memory: 256MB = 256MB total :smileyhappy: YES !!
Memory: 250688k/250688k available, 11456k reserved, 0K highmem
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
DMA : 0xfde00000 - 0xffe00000 ( 32 MB)
vmalloc : 0xd0800000 - 0xf0000000 ( 504 MB)
lowmem : 0xc0000000 - 0xd0000000 ( 256 MB)
modules : 0xbf000000 - 0xc0000000 ( 16 MB)
.init : 0xc0008000 - 0xc002b000 ( 140 kB)
.text : 0xc002b000 - 0xc0483000 (4448 kB)
.data : 0xc0484000 - 0xc04bd060 ( 229 kB)
SLUB: Genslabs=11, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Hierarchical RCU implementation.
RCU-based detection of stalled CPUs is disabled.
Verbose stalled-CPUs detection is disabled.
NR_IRQS:288
Console: colour dummy device 80x30
console [ttyAM0] enabled
Calibrating delay loop... 226.09 BogoMIPS (lpj=1130496)
pid_max: default: 32768 minimum: 301
Security Framework initialized
SELinux: Initializing.
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
regulator: core version 0.5
NET: Registered protocol family 16
regulator: vddd: 800 <--> 1575 mV at 1500 mV fast normal
regulator: vdddbo: 800 <--> 1575 mV fast normal
regulator: vdda: 1500 <--> 2275 mV at 1800 mV fast normal
vddio = 3380000, val=10
regulator: vddio: 2880 <--> 3680 mV at 3380 mV fast normal
regulator: overall_current: fast normal
regulator: vbus5v:
regulator: mxs-duart-1: fast normal
regulator: mxs-bl-1: fast normal
regulator: mxs-i2c-1: fast normal
regulator: mmc_ssp-1: fast normal
regulator: mmc_ssp-2: fast normal
regulator: charger-1: fast normal
regulator: power-test-1: fast normal
regulator: cpufreq-1: fast normal
i.MX IRAM pool: 124 KB@0xd0820000
GPIO request for 33554457 (SW2)
GPIO request for 33554458 (SW3)
GPIO request for 33554456 (SGTL5000_HP)
GPIO request for 33554447 (MAIN_DETECT)
GPIO request for 50331655 (ENABLE_BATT)
GPIO request for 33554459 (LOAD_BAT)
GPIO request for 16777247 (BTN_T1)
GPIO request for 50331678 (BTN_T2)
GPIO request for 50331662 (usb0)
GPIO request for 50331663 (usb1)
Initializing GPMI pins
usb DR wakeup device is registered
IMX usb wakeup probe
audit: cannot initialize inotify handle
bio: create slab <bio-0> at 0
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
Advanced Linux Sound Architecture Driver Version 1.0.23.
Switching to clocksource mxs clock source
NET: Registered protocol family 2
IP route cache hash table entries: 2048 (order: 1, 8192 bytes)
TCP established hash table entries: 8192 (order: 4, 65536 bytes)
TCP bind hash table entries: 8192 (order: 3, 32768 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
Trying to unpack rootfs image as initramfs...
rootfs image is not initramfs (junk in compressed archive); looks like an initrd
Freeing initrd memory: 4096K
Bus freq driver module loaded
IMX usb wakeup probe
usb h1 wakeup device is registered
mxs_cpu_init: cpufreq init finished :smileycry:
Then it freezes . Don't you have any tip ?
thanks in advance
Jean
Hi Jean,
The addressing table I showed in last comment doesn't apply to your MT47H128M16. It is from the datasheet of Micron 1GB DDR2.
You should check the datasheet of MT47H128M16 to get correct addressing.
MT47H128M16 – 16 Meg x 16 x 8 banks
So ADDR_PINS should be 1 and COLUMN_SIZE should be 2.
Grace
So here is what i done
#define PHYS_SDRAM_1_SIZE 0x10000000 in imx bootlet
I changed HW_DRAM_CTL29 to 0x0f02010a in kernell and imx bootlets
and i rebuilt all ( seems to be very important) ./ltib --force
and it works: my ddr2 with 256 MB is functional
Another question: i would need a program that tests ram to do temperature working test . don't you know where to get one
Thanks in advance
Dear Jean, dear Grace, dear Yixing and others.
Sorry, that I open this closed discussion... But here I can not find clear information how to increase memory from 128MB to 256MB in i.MX28 project. I think, the clean answer will be very useful for other designers. I have the same problem as problem of Jean.
I use in my project the DDR2 SDRAM MT47H128M16 – 16 Meg x 16 x 8 banks.
Row address A[13:0] (16K), actual number of address pins = 14.
Column address A[9:0] (1K), actual number of column pins = 10.
So in the DRAM Control Register 29 (HW_DRAM_CTL29) should be:
the field 10...8 (ADDR_PINS) = 15-14 = 1.
the field 18...16(COLUMN_SIZE) = 12-10 = 2.
other fields are unchanged (as in i.MX28 Evk project).
As the result I should write the value 0x0F02010A into the HW_DRAM_CTL29.
Moreover I should write the value 0x10000000 (which means 268435456 Bytes of memory) into definition SDRAM_SIZE in imx bootlet.
I have made change :
#define SDRAM_SIZE 0x10000000
in the file : imx-bootlets-src-2.6.35.3-1.1.0/linux_prep/include/mx28/platform.h
which I could find in the archive: /opt/freescale/pkgs/imx-bootlets-src-2.6.35.3-1.1.0.tar.gz
Is it right?
I found definition :#define HW_DRAM_CTL29 (0x00000074)
in the file : ltib/rpm/BUILD/linux-2.6.35.3/arch/arm/mach-mx28/regs-dram.h
But (0x00000074) - it is physical address of HW_DRAM_CTL29 register...???
Where should I change ADDR_PINS and COLUMN_SIZE ? Help me please.
Thanks in advance.
Dmitry.
Hi, Yuri! Many thanks for your help!!!
As a result I've got the 256MB of memory.
Memory: 256MB = 256MB total
Memory: 250152k/250152k available, 11992k reserved, 0K highmem
...
...
...
root@freescale ~$ free
total used free shared buffers
Mem: 254408 12524 241884 0 412
-/+ buffers: 12112 242296
Swap: 0 0 0
What I have done:
1- used command:
./ltib -m prep -p imx-bootlets-src
2- made changes:
#define SDRAM_SIZE 0x10000000
in the file: ltib/rpm/BUILD/imx-bootlets-src-2.6.35.3-1.1.0/linux_prep/include/mx28/platform.h
DRAM_REG[29] = 0x0f02010a ;
everywhere in the file: ltib/rpm/BUILD/imx-bootlets-src-2.6.35.3-1.1.0/boot_prep/init-mx28.c
DRAM_REG[29] = 0x0f02010a;
everywhere in the file: ltib/rpm/BUILD/linux-2.6.35.3/arch/arm/mach-mx28/emi_settings.c
3- used commands:
./ltib -m scbuild -p imx-bootlets-src
./ltib -m scdeploy -p imx-bootlets-src
4- rebuilt all my project.
With best regards,
Dmitry.
Jean
We assum your question had been answered by Grace's response and close the DI. If you still need further help, please feel free to reply with an update to this discussion, or create another discussion.
Thanks,
Yixing
Jean
Had your issue got resolved? If yes, we are going to close the discussion in 3 days. If you still need help, please feel free to reply with an update to this discussion.
Thanks,
Yixing