Can you please tell me how to connect two DDR3L chips of 256MByte density and a 16bit wide data bus to a i.MX6 ULL processor?
Hi Igor,
thanks for your answer. I have these design files but I am still not sure how to connect two DDR3L chips to the i.MX6 ULL. In the schematic the schematic I can only find one chip connected to the i.MX6 ULL with the option to connect a twin- die DDR3L to the i.MX6 ULL.
Can I connect two chips instead of one twin-die chip just using the signals ODT1,SDCKE1, ZQ1 and CS1?
I am a little bit confused because in the Reference Manual for the i.MX 6ULL processor on page 2218 I found this Note:
NOTE
This feature will not be supported for DDR3 since only a single
chip select is supported for DDR3
Can you explain this to me?
Best regards
Michael
Hi Michael
seems this statement was left from i.MX6SX Reference Manual, i.MX6SX
works fine with ddr3 two chip selects.
Best regards
igor
Hello Igor,
thanks for your answer,
I have one more question.
On page 2276 of the reference manual I can find the information that
address mirroring will only work for DDR2/DDR3 memories and not for
DDR2L/DDR3L. Is this right?
(Embedded image moved to file: pic01200.gif)
Mit freundlichen Grüßen
i. A. Dipl.Ing.(FH) Michael Nübling
Hardwareentwicklung
S. Siedle & Söhne Telefon- und Telegrafenwerke OHG
Bregstraße 1, 78120 Furtwangen
Telefon: +49 7723 63-307
Von: "igorpadykov" <admin@community.nxp.com>
An: "Michael Nübling" <michael.nuebling@siedle.de>
Datum: 15.05.2018 14:20
Betreff: Re: - Re: How to connect DDR3L to i.MX6 ULL
NXP Community
Re: How to connect DDR3L to i.MX6 ULL
reply from igorpadykov in i.MX Community - View the full discussion
Hi Michael
seems this statement was left from i.MX6SX Reference Manual, i.MX6SX
works fine with ddr3 two chip selects.
Best regards
igor
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Hi Michael
please look at i.MX6ULL EVK design files
Schematics (1)
Design files, including hardware schematics, Gerbers, and OrCAD files.
MCIMX6ULL-EVK_DESIGNFILES
http://www.nxp.com/products/software-and-tools/software-development-tools/i.mx-software-and-tools/ev...
Best regards
igor
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Hi Igor,
thanks for your answer. I have these design files but I am still not sure
how to connect two DDR3L chips to the i.MX6 ULL. In the schematic the
schematic I can only find one chip connected to the i.MX6 ULL with the
option to connect a twin- die DDR3L to the i.MX6 ULL.
Can I connect two chips instead of one twin-die chip just using the signals
ODT1,SDCKE1, ZQ1 and CS1?
I am a little bit confused because in the Reference Manual for the i.MX
6ULL processor on page 2218 I found this Note:
NOTE
This feature will not be supported for DDR3 since only a single
chip select is supported for DDR3
Can you explain this to me?
Best regards
Michael
Mit freundlichen Grüßen
i. A. Dipl.Ing.(FH) Michael Nübling
Hardwareentwicklung
S. Siedle & Söhne Telefon- und Telegrafenwerke OHG
Bregstraße 1, 78120 Furtwangen
Telefon: +49 7723 63-307
Von: "igorpadykov" <admin@community.nxp.com>
An: "Michael Nübling" <michael.nuebling@siedle.de>
Datum: 10.05.2018 01:25
Betreff: Re: - Re: How to connect DDR3L to i.MX6 ULL
NXP Community
Re: How to connect DDR3L to i.MX6 ULL
reply from igorpadykov in i.MX Community - View the full discussion
Hi Michael
please look at i.MX6ULL EVK design files
Schematics (1)
Design files, including hardware schematics, Gerbers, and OrCAD files.
MCIMX6ULL-EVK_DESIGNFILES
http://www.nxp.com/products/software-and-tools/software-development-tools/
i.mx-software-and-tools/evaluation-kit-for-the-i.mx-6ull-applications-proc
essor:MCIMX6ULL-EVK?tab=Design_Tools_Tab
Best regards
igor