Hi All,
In the document Freescale i.MX6 DRAM Port Application Guide – DDR3 we can see the sample read and write delay calibrations in section 3.1.2
From following write level calibration of 2 boards we can see from the red highlighted lines Board 1 has got 0x11111111 too early than Board 2.
1) What can we figure from this ? If 0 represent pass values and 1 represent fail; according to user manual why some results are like 0x10111111 ?
2) If wider the 0 window, it represent more pass results for the ddr. Is that good or bad ?
3) Why it is showing at top and bottom half all 1 ? Is that mean read or write fails ? If at the very bottom result include 0 result what can we say about that byte lane ?
4) Can we get any failures of byte lane of the memory from this results ?
Regards,
Peter.
Board 1 (Working Board)
Board 2 (Faulty board)
Hi Peter
results 0x10111111 are high and low failure points as described in
sect.13 Read DQS Delay Calibration AN4467 i.MX6 Series DDR Calibration
https://www.nxp.com/docs/en/application-note/AN4467.pdf
>2) If wider the 0 window, it represent more pass results for the ddr. Is that good or bad ?
good
>4) Can we get any failures of byte lane of the memory from this results ?
these results seem as good, so from them there is no way to tell reason for linux failures.
Best regards
igor
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