Hi there,
I'm using a custom made i.MX6dl-sabresd board to develop our product. We change the spi flash to S25FL128S and I can't probe the flash corretly in u-boot. When I use
sf probe
in u-boot, I got message:
SF: Unsupported flash IDs: manuf 00, jedec 0000, ext_jedec 0000
Is there any document that explains how to add the support for new SPI NOR flash in U-boot? or what files I should update/modify to make S25FL128S be detected in u-boot and kernel?
For more detailed,
1. The custom made board is almost as same as standard i.MX6dl-sabresd reference board.
2. I don't have standard i.MX6dl-sabresd reference board now, so I can't try the "sf" command on it.
3. The BSP release used is Yocto project 2.1(release L4.1.15_2.1.0).
4. Hardware changed eMMC, ram, spi flash from standard platform.
5. I'm NOT going to boot-up system from spi nor flash, I will boot it up from eMMC, I just want to make sure the spi nor flash is readable and writable.
Thank you for your patient.
Best Regards,
PENG, Cheng-Hui
Hi PENG
please look at spi_flash_params_table in uboot/drivers/mtd/spi/sf_params.c
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/drivers/mtd/spi/sf_params.c?h=imx_v2016...
Best regards
igor
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Hi igorpadykov,
Thank you for your reply. I have checked my sf_params.c and the ID of new device is listed in the file. I measured the IC pins of spi flash and there is no clock out put. So I checked the circuit and it's different from reference board, the spi nor flash is connected to SPI3.
I tried to us command
sf probe X:0 (X=1 or 2 or 3)
but it still failed to init spi flash.
Starting to read SPI device ID...
spi_xchg_single: Timeout!
SF: Failed to get idcodes
Failed to initialize SPI flash at X:0 ( X= 1 or 2 or 3)
Should I change any settings or modify any files?
If you're using a different ecspi bus, make sure you have enabled the clock for it in u-boot !
i.e. static void setup_spi(void){
u32 reg;
struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
// Enable ECSPI3 clocks
reg = readl(&ccm->CCGR1);
reg |= 0x30;
writel(reg, &ccm->CCGR1);
}