External debug reset catch debug event not working

[pauricmcginty]

I am developing an external JTAG debugger for some NXP products.

For external debug a Reset Catch debug event should be generated when EDECR.RCE = 1 and the processor exits reset state. If halting debug mode is enabled this should cause the processor to enter debug mode.

This does not seem to work for either i.MX8MQ or i.MX6Q.

When I set EDECR.RCE = 1 and do a reset the processor boots (does not break at reset).

When I check the reset state (EDPRSR.R) it actually shows that the processor is in reset state, even though it is booting.

Are there any known issues with external debug reset catch debug events?

[igorpadykov]

Hi Pauric

issue may be explained below arm article "Why is my target not responding to debug commands..", as

i.MX6,8 reset is handled by boot rom and System Reset Controller (SRC).

ARM Information Center 

Best regards
igor
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[pauricmcginty]

Thanks Igor.

The link is interesting. However, I'm not sure how it works as I'm pretty certain that hardware breakpoints get cleared by a system reset. I have tried setting a breakpoint at 0x0 and then asserting nSRST but it does not break.

I have tried playing around with the A53 Reset Control Register (SRC_A53RCR0) on i.MX8 to assert a reset (instead of using the nSRST pin) and in that case I do see it breaking at 0x0 when I set EDECR.RCE = 1. It would be nice if it did the same thing when asserting nSRST.

[ranjith_tc]

Hi Pauric,

What all things i need to do on i.MX8 to assert a reset in A53 using Reset Control Register and break at reset (other than set EDECR.RCE = 1) ?