DDR2 Calibration and Stress Test for i.MX28

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DDR2 Calibration and Stress Test for i.MX28

Contributor III


I am trying to run OBDS on a i.MX28 custom board with new DDR2 SDRAM.

Please share link or file for:

1. Correct version of DDR2 Register Programming Aid (xlsx file) for i.MX28

2. Correct version of DDR2 Calibration Test for i.MX28

3. Correct version of DDR2 Stress Test for i.MX28



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NXP Employee
NXP Employee


Please look at my comments below.


  Please refer to the following :

Board Bring-up and DDR Initialization Tools 


  There are the echo gating output and feedback signals (EMI_DDR_OPEN and EMI_DDR_OPEN_FB),
used by the DRAM PHY to put a window around the DQS transition.
They should be routed so that
length of trace from DDR_Open to DDR_Open_FB is 
mean ( EMI_CLK+EMI_CLKn , DQS0+DQS0n, DQS1+DQS1n ).

Some calibration procedure could help in case of EMI_DDR_OPEN and EMI_DDR_OPEN_FB signals violation,
but we do not have such code for calibration. 


  We do not have the Stress Test for I.MX28, but the following thread contains "mem_test",

which is based on FSL / NXP codes, used for DDR stress tester of i.MX6.

Re: i.MX28 DDR stress test

The Code Sourcery (Mentor) toolchain (host – Windows, executable (.elf)

image  – for bare metal) was used to build it. As I know, such release is not

available now on Mentor web. You may try other GNU compiler.

  One can try to load the test via a JTAG debugger (test.elf file should be used

here) or it is possible to load and run the test (test.sb) via USB in i.MX28 recovery

mode. Please use usb_load.bat for it. Note the sources contain memory initialization

for i.MX28 EVK. Perhaps it is needed to modify initialization for specific board.

Have a great day,

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