CLK1 / CLK2 pins on i.mx6q

[ivankozic]

Hi all,

I seem to have an issue understanding the CLK2 differential clock (CLK2_p, CLK2_n). Currently, there is no explanation on how to use these pins. Before, in Rev. C of the i.MX6 Consumer Datasheet, there was some info about this in Chapter 3.1. It stated that these differential pins could be used as both input and output. However, for some reason there was no info on how to access them in Reference Manual. In the current revisions of RM and DS there's no mention of these pins, except in the final chapter of the RM where it only states that they are outputs.

Since I would like to use this clock as an output, could someone please point me in the right direction on where to look any further information? There seems to be no signal on the pins currently - and this probably depends on the PLL config, but as there's no info about which PLL is used for this...

Thanks in advance!

[PradapRaj · Accepted solution]

Hi Ivan,

Even-though there is no detailed information about CLK1/CLK2 differential pins in i.MX6 RM, you can set these pins as input/output and set the clock output value using the PMU_MISC1n register (which is mentioned in Power Management Unit chapter). Here instead of CLK1/CLK2, it is mentioned as LVDSCLK1/LVDSCLK2.

Regards,

Pradap