For the processor options like MCIMX7D3EVK10SD that do NOT support CAN, the other shared muxed I/O at the processor balls are still available correct?
It seems like that is the case, but I had trouble finding confirmation in the TRM/datasheet. So I just wanted to confirm this.
Hi Johnathan
yes correct, in this case other shared muxed I/O at the processor balls are still available.
Best regards
igor
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