About layout of DDR3 in i.MX6Q SABRE-AI.

[keitanagashima]

Dear Sir or Madam,

Hello.

I have a question about the layout of DDR3 in i.MX6Q SABRE-AI.

SABRE-AI is designed by four DDR3 with T-topology opposite sides.

But, as a result of the simulation of the customer, as for the both side implementing of BGA, the danger of solder crack is high with the heat stress to DDR solder ball.

Please give me your comment or advice.

How did freescale review to fix the layout?

Is there a problem to the reliability?

Best Regards,

Keita

[keitanagashima]

Dear All,

Anyone, I'd like your advice for my 1st topic.

Please follow it.

Best Regards,

Keita

[chaitanyasvnns]

Hi Keita,

Have you performed simulation on SABRE-AI layout design?? or you have designed your own custom board like Sabre-AI board?

If it is custom board what is your PCB thickness and also tell me the heat stress levels you are applying while doing simulation

i have designed my own custom board based on IMX6 dual core processor with 4 DDRs as top and bottom placement and we have performed SI analysis and our boards are working fine.

Regards,

Chaitanya

[keitanagashima]

Dear Chaitanya,

Thank you for your reply.

I answered your questions.

>Have you performed simulation on SABRE-AI layout design??

>or you have designed your own custom board like Sabre-AI board?

It's custom board like SABRE-AI.

>If it is custom board what is your PCB thickness and also tell me the heat stress levels you are applying while doing simulation

>PCB thickness: 4 kind of board (0.8mm, 1.0mm, 1.2mm, 1.6mm)

Heat stress levels:

-Temperature: -30 ~ +80 degrees

-Time: 30min/30min

-Transition temperature: Setting of less than 5 minute

[Note]

Of cause, we understood that FSL board is very good from result of SI analysis.

But, my customer would like to know the physics analysis data for with 4 DDRs as top and bottom placement .

(For example, secular change stress or heat stress.)

Best Regards,

Keita