About changing the VPU clock in i.MX6DQ.

[keitanagashima]

Dear All,

Is it possible to change the VPU Clock source from PLL2_PFD2 to PLL2_PFD0?

My customer doesn't use the PLL2_PFD0 for any other.

Is there some impact?

Device i.MX 6Dual

BSP: jb4.2.2_1.1.0 (L3.0.35)

Best Regards,

Keita

[karina_valencia · Accepted solution]

PengFushi Nov 25, 2015 8:22 PM (in response to Jaime Hueso Zavala)

usually PLL2_PFD0 is used by LVDS. LVDS clock is not expected to be changed. If there is no any other module which used PLL2_PFD0, VPU clock can be configured to use PLL2_PFD0.