About a VIL level of VDD_SNVS_IN for i.MX7Solo

[yuuki]

Dear all,

Would you tell me the VIL specification of VDD_SNVS_IN of i.MX7Solo?

We use Tamper function of i.MX7Solo.
We understand that all SNVS_LP registers are reset by POR.

However, even if i.MX7 is powered off, these value seems to be left during several hundred milliseconds.
When power supply is turned ON/OFF at very short time, these value remain.
(ET1_EN bit=1, ET2_EN bit=1, ET3_EN bit=1, ET1D=1, ET2D=1, ET3D=1)

We found VDD_SNVS_IN voltage falling slowly, when a power supply was turned off.

We want to know the VIL specification of VDD_SNVS_IN to reset SNVS_LP register certainly.
We referred to a data sheet, but were not able to find it.

Best Regards,
Yuuki

[art]

VDD_SNVS_IN should fall to and then start its power-on ramp-up from at least 0.3V value for the correct operation.

Have a great day,
Artur

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