About LCD control signals of MX6DL_SABRE-SDP.

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About LCD control signals of MX6DL_SABRE-SDP.

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yuuki
Senior Contributor II

Dear all,

We'll connect a LCD panel.

In MX6DL_SABRE-SDP, there are the following control signals.

DI0_PIN2 => DISP0_HSYNCH
DI0_PIN3 => DISP0_VSYNCH
DI0_PIN4 => DISP0_CNTRST
DI0_PIN15 => DISP0_DRDY

These signals aren't explained in "Pin Assignments" of a reference manual(IMX6SDLRM.pdf).
However, in IOMUX tool, these signals are assigned to ALT1 mode.

Can these signals be used in ALT1 mode?
Or is the GPIO function used as these signals?

Best Regards,
Yuuki

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546 次查看
igorpadykov
NXP Employee
NXP Employee

Hi yuuki

in Linux DI0_PIN2,3,15 are used in ALT0 mode as

IPUa_DIb_PINcd, one can look at ipu_disp.c.

I think it is not possible to produce IPU sync signals with GPIO

configurations.

Seems DI0_PIN4  DISP0_CNTRST is used as GPIO (ALT5).

Probably for these signals IOMUX tool has some inaccuracies.

Best regards

igor

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547 次查看
igorpadykov
NXP Employee
NXP Employee

Hi yuuki

in Linux DI0_PIN2,3,15 are used in ALT0 mode as

IPUa_DIb_PINcd, one can look at ipu_disp.c.

I think it is not possible to produce IPU sync signals with GPIO

configurations.

Seems DI0_PIN4  DISP0_CNTRST is used as GPIO (ALT5).

Probably for these signals IOMUX tool has some inaccuracies.

Best regards

igor

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