Dear community.
Our customer has question about select of GPU2D_CORE_CLK_ROOT of i.MX6Solo.
I would like to please tell us about GPU2D_CORE_CLK_ROOT of i.MX6S of CCM,
Figure 18-2 of IMX6SDLRM Rev.2. According to the Clock Tree
GPU2D_CORE_CLK_ROOT is select from AXI, pll3_sw_clk and PLL2 PFD0, PLL2 PFD2
but In the description of the 18.6.7 CCM Bus Clock Multiplexer Register ,
gpu2d_core_sel is select from mmdc_ch0 clk, pll3_sw_clk,and PLL2 PFD1, Reserved.
Which is correct ?
Solved! Go to Solution.
Finally, I've got the answer from the engineers. The answer is: the Figure 18-2 on the Page 785 is correct, the register definition in the Section 18.6.7 is not. The register definition section will be corrected in the next document release.
Have a great day,
Artur
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Finally, I've got the answer from the engineers. The answer is: the Figure 18-2 on the Page 785 is correct, the register definition in the Section 18.6.7 is not. The register definition section will be corrected in the next document release.
Have a great day,
Artur
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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I have escalated your request to the experts team, awaiting for the answer from them.
Have a great day,
Artur