About EIM burst length in i.MX6SL.

[keitanagashima]

Dear All,

Hello.

First, refer to Table 20-6. AXI Burst Cycles Supported in IMX6SLRM(Rev.2).

It looks support only 16 word.

Next, refer to "BL" bits of 20.9.1 Chip Select n General Configuration Register 1 (EIM_CSnGCR1) in IMX6SLRM(Rev.2).

The description looks 32 words setting can be set.

Why did look the difference?

Best Regards,

Keita

[igorpadykov · Accepted solution]

Hi Keita

you are right there is difference, because EIM and AXI bus

IP modules were developed independently and before i.MX6SL design.

These IP blocks are used in many processors.

Best regards

igor

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