Hello,
I am trying to connect ADV7181C on imx6 custom board's IPU 0 CSI0 port. for that I am changing
adv7180.c file. mainly I am changing adv7180_hard_reset() function fot i2c register settings.but As soon as I load
my driver I get message adv7180:no video lock. if I see on my hardware all 8 data lines are coming fine. and my driver
is in autodetect std mode. Can anybody guide me to resolve this issue.
TIA
Solved! Go to Solution.
Hi Arti
please check how deinterlacing is implemented in unit test
imx-test/..mxc_v4l2_test/mxc_v4l2_tvin.c
www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-test-5.7.tar.gz
Best regards
igor
Hi Arti
one can check what mode is used bt656 or gated, please look at
Best regards
igor
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Hi igor,
Thanks for the reply, That link I have seen before, and when I use my adv7180 in BT656 mode, I am getting
split image as mentioned in that link, and solution was given to use hsync,vsync and made it to 16 bit. but
I want to use my driver for BT656 8 bit mode ( where there will be no need of hysnc,vsync. EAV and SAV will do
the work). Any idea how can I achieve that?
TIA
-Arti
Hi Arti
please check how deinterlacing is implemented in unit test
imx-test/..mxc_v4l2_test/mxc_v4l2_tvin.c
www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-test-5.7.tar.gz
Best regards
igor
Hi Igor,
you were right, that problem because of v4l2 user application I am using, mxc_v4l2_tvin.c I can not use because it
requires display, On my custom imx6 I do not have display. So I have modified Capture and save frame application
and it worked.
Hi igor,
I am using mxc_v4l2_still.out to capture and save frame on imx6, as I do use fb for output. mxc_v4l2_tvin
requires fb0. One more thing I have noticed: DATA_EN of csi0 is not connected. I guess that is required, which
is mentioned in below link:
https://community.nxp.com/thread/443555
what I have understood is DATA_EN requires for correct timing and sync. Please help me if I am missing something.