AC-Coupling of PCIe-Clock / i.MX 8M Mini

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AC-Coupling of PCIe-Clock / i.MX 8M Mini

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j_affholderbach
Contributor I

Hello,

I need some information about the PCIe of the i.MX 8M Mini, especially the PCIe-clock.

In our design the clock is fed by an external clock-synthesizer, which has LVDS output buffers.
Is it correct, that AC-coupling is required in this case? Is a DC-bias needed at the clock input?

In the hardware developer's guide is written:

"PCIe specification compliance requires AC coupling at each transmitter. The receiver must be DC coupled."

So I guess, that AC-coupling at the clock (transmitter) is necessary, but I'm a little bit confused,
because in the schematics of the eval-board (base board) no AC-coupling is used, but in this case the output buffers of the clock are HCSL.

Thank you for your help in advance.

Regards

Julian

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art
NXP Employee
NXP Employee

The PCIE_TXP and PCIE_TXM signals should be AC coupled. The AC coupling for the PCIE_RXP and PCIE_RXM signals is not required.

In case of using the clock synthesizer with HCSL output buffers, the AC coupling and termination of the clock signals is not requred. In case of using the clock synthesizer with LVDS output buffers, the AC coupling and individual 50 Ohm termination of each differential clock lane to GND is requred.

As the reference, you can use the PCIe design similar to the one implemented on the i.MX6 SABRE SD board:

https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/sabre-board-for...

On this board, the internally generated by i.MX6 clock output through built-in LVDS buffers is used.

Best Regards,

Artur

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j_affholderbach
Contributor I

Hello Artur,

thank you for your reply! That helped me a lot!

Regards,

Julian

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1,383 Views
art
NXP Employee
NXP Employee

The PCIE_TXP and PCIE_TXM signals should be AC coupled. The AC coupling for the PCIE_RXP and PCIE_RXM signals is not required.

In case of using the clock synthesizer with HCSL output buffers, the AC coupling and termination of the clock signals is not requred. In case of using the clock synthesizer with LVDS output buffers, the AC coupling and individual 50 Ohm termination of each differential clock lane to GND is requred.

As the reference, you can use the PCIe design similar to the one implemented on the i.MX6 SABRE SD board:

https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/sabre-board-for...

On this board, the internally generated by i.MX6 clock output through built-in LVDS buffers is used.

Best Regards,

Artur

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