6ull ddr3 configuration

[lvjz]

Hi, we used nxp 6ull and winbond ddr3(w631GG6mb).The system occasionally crashes .We did not encounter this problem when using Samsung ddr3. Winbond engineers are helping to solve this problem.
When Winbond engineers deal with the problem,he need a memory configuration so that the memory clock keeps output.We have tried 21B_0004H [15:8] set to 0 ,and 21B_0404H [0] set to 1. But the memory clock still has a break.How do I set registers to keep the memory clock uninterrupted?

[lvjz]

We have used the script to configurate the DDR3 . I’d like to know which register and how to config  so that   I can keep the DDR3 clock uninterrupted. We tried disable  MAPSR[PSD], MDPDC[PWDT_1], MDPDC[PWDT_0], MDPDC[PRCT_0],MDPDC[PRCT_1]. ,but these don't work .

[Rita_Wang]

About the DDR configuration you can use the script https://community.nxp.com/docs/DOC-333791