1.lvds
1.uboot中Mx6q_tqcorec.c u-boot-imx-2014.04\board\freescale\Mx6q_tqcorec
static struct display_info_t const displays[] = {
{
.bus = -1,
.addr = 0,
.pixfmt = IPU_PIX_FMT_RGB24,
.detect = NULL,
.enable = do_enalle_lvds_clock,
.mode = {
.name = "LVDS10",
.refresh = 60,
.xres = 800,
.yres = 600,
.pixclock = 25000,
.left_margin = 256,
.right_margin = 0,
.upper_margin = 0,
.lower_margin = 28,
.hsync_len = 1,
.vsync_len = 1,
.sync = FB_SYNC_EXT,
.vmode = FB_VMODE_NONINTERLACED
}
}
};
static void setup_display(void)
{
.........................
reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES
| IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW
| IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW
| IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG
| IOMUXC_GPR2_DATA_WIDTH_CH1_24BIT
| IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG
| IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT
| IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED
| IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0;
writel(reg, &iomux->gpr[2]);
reg = readl(&iomux->gpr[3]);
reg = (reg & ~(IOMUXC_GPR3_LVDS0_MUX_CTL_MASK
| IOMUXC_GPR3_HDMI_MUX_CTL_MASK))
| (IOMUXC_GPR3_MUX_SRC_IPU1_DI0
<< IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
writel(reg, &iomux->gpr[3]);
}
2.dts
aliases {
mxcfb0 = &mxcfb1;
mxcfb1 = &mxcfb2;
mxcfb2 = &mxcfb3;
mxcfb3 = &mxcfb4;
};
mxcfb1: fb@0 {
compatible = "fsl,mxc_sdc_fb";
disp_dev = "ldb";
interface_pix_fmt = "RGB24";
default_bpp = <24>;
int_clk = <0>;
late_init = <0>;
status = "disabled";
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: hsd100pxn1 {
clock-frequency = <40000000>;
hactive = <800>;
vactive = <600>;
hback-porch = <256>;
hfront-porch = <0>;
vback-porch = <0>;
vfront-porch = <28>;
hsync-len = <1>;
vsync-len = <1>;
};
};
};
lvds-channel@1 {
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
primary;
status = "okay";
display-timings {
native-mode = <&timing1>;
timing1: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};
3.uboot参数设置
setenv bootargs console=ttymxc0,115200 video=mxcfb0:dev=ldb,LDB-XGA,if=RGB24 ldb=sin0 video=mxcfb1:off video=mxcfb2:off video=mxcfb3:off root=/dev/nfs rw ip=192.168.1.103:192.168.1.235:192.168.1.1:255.255.255.0 fec_mac=12:32:43:34:21:43 nfsroot=192.168.1.235:/home/nfs_server/imx6q_3.14.28_rootfs,proto=tcp,nfsvers=3,nolock