Is there any documentation, I can refer to which details how the bootloader works, please? As per "UM10995 " section 4, there are 3 major operation. I am after details on how the update over SWD works. As per the Keil configuration the image is flashed to the System SRAM. How/What triggers the bootloader to load the application onto the Flash?
Section 4 says the bootlader looks for a connection for UART and SPI. What is the connection timeout for the bootloader? Section 4 points to 5.4.3. But that section appears to be missing. in the document. Does it mean CMD COde 0x33? How does this work when using JLINK SWD?
The QN9020 bootloader is located in ROM as de document mentions, the bootloader has to modes, ISP and Load mode. When the QN902x is powered on or reset, the bootloader is activated firstly. It looks for a connection command from UART and SPI interface for a while to determine which mode to go.
How/What triggers the bootloader to load the application onto the Flash?
If the Bootloader doesn't find out the ISP command response from UART or SPI interface, it will copy the application to RAM
Does it mean CMD COde 0x33?
Build a connection with bootloader the command that uses the ISP Studio.
How does this work when using JLINK SWD?
The JLink is not using the ISP Commands, the QN9020 has a Cortex, the JLink, controls all the CPU registers and knows the address to program the Flash, without the Bootloader.