workaround for e8052 (RMII)

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

workaround for e8052 (RMII)

跳至解决方案
630 次查看
eishishibusawa
Contributor III

Dear Sir

 

I want to ask the workaround for e8052.

It is described  at 12.3.0.2 Internal RMII reference clock in VYBRIDHDUG Rev.1.

I want to confirm the workaround based on "EXTERNAL CLOCK SOURCE" scheme.

 

Q1.

Can I select the CKO1 or CKO2 pin for the clock_Out pin(Fig42)?

 

Q2.

Are there any problem to select the PLL5 for clock source of the clock_Out(Fig42)?

 

Best Regards,

Eishi SHIBUSAWA,

标签 (1)
0 项奖励
1 解答
462 次查看
Yuri
NXP Employee
NXP Employee

Hello,

  Yes, it is possible to use one of CKOs, sourced with the PLL5, for the clock_Out.


Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

在原帖中查看解决方案

0 项奖励
1 回复
463 次查看
Yuri
NXP Employee
NXP Employee

Hello,

  Yes, it is possible to use one of CKOs, sourced with the PLL5, for the clock_Out.


Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 项奖励