Hi all,
We are using custom board based on t4240rdb (SDK V1.6) and want to distribute pci express interrupt to all cpu cores to make load balancing.
Pci express works in legacy mode. irq number is 40.
"/proc/irq/40/smp_affinity" value is "ffffff".
But, unfortunately, pci interrupt always processed in one core* with this configuration setting. When we change smp_affinity value for some specific cpu core it works fine, but it is not possible to work with multiple cores.
What could be the reason? How should be distributed pcie interrupt for all cpu cores?
*pci irq core number starts with CPU0, after resetting smp_affinity to ffffff again, it arbitrarily changing to other cores.
The interrupt controller on t4240 does not support this, nor is it desirable behavior due to cache locality. If you're going to set IRQ affinity manually, the IRQ affinity should be set to a CPU in the same cluster as the CPUs that interact the most with the device, and try to avoid assigning multiple high-workload interrupts to the same CPU.