Hello,
I am attempting to update a T4240QDS from SDK v1.5 to 1.8. However, I would like to leave bank 0 alone and only update bank 4 with the new u-boot.
Here are the changes that were made to the alternate bank (bank 4) from bank 0, using images from SDK v1.8:
- RCW at 0xec000000
- U-boot at 0xebf40000
- Fman ucode at 0xebf00000
- U-boot env at 0xebf20000 (with mods to ubootaddr and fman_ucode env vars to the SDK v1.8 NOR flash memory mapping)
When switching to the alternate bank (either with command "qixis altbank" or changing SW6[1:4] to 0100), the system hangs and there is no debug output to the serial terminal.
Is this the correct way to update to the newer SDK? Or do both banks need to be updated to SDK v1.8 since the NOR flash memory map is different?
Thanks,
Chris
已解决! 转到解答。
Hello Chris,
You didn't use the correct u-boot image, you used the u-boot image for secure boot, please use the normal u-boot image u-boot-T4240QDS.bin, I attached it for you.
Have a great day,
Yiping
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Hello Chris,
The images deployment addresses should be correct for SDK 1.8.
Do you use T4240 Rev 1.0 or Rev 2.0 board? Did you use the correct RCW image?
Is possible for you to provide the u-boot log(including SDK 1.8 images deployment steps on bank0)?
Have a great day,
Yiping
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Here is the bank 0 u-boot log:
U-Boot 2013.01QorIQ-SDK-V1.5 (Dec 15 2013 - 18:54:15)
CPU0: T4240E, Version: 2.0, (0x82480020)
Core: E6500, Version: 2.0, (0x80400120)
Clock Configuration:
CPU0:1666.667 MHz, CPU1:1666.667 MHz, CPU2:1666.667 MHz, CPU3:1666.667 MHz,
CPU4:1666.667 MHz, CPU5:1666.667 MHz, CPU6:1666.667 MHz, CPU7:1666.667 MHz,
CPU8:1666.667 MHz, CPU9:1666.667 MHz, CPU10:1666.667 MHz, CPU11:1666.667 MHz,
CCB:733.333 MHz,
DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:183.333 MHz
FMAN1: 733.333 MHz
FMAN2: 733.333 MHz
QMAN: 366.667 MHz
PME: 533.333 MHz
L1: D-cache 32 kB enabled
I-cache 32 kB enabled
Reset Configuration Word (RCW):
00000000: 16070019 18101916 00000000 00000000
00000010: 04383060 30548c00 ec020000 f5000000
00000020: 00000000 ee0000ee 00000000 000307fc
00000030: 00000000 00000000 00000000 00000028
Board: T4240QDS, Sys ID: 0x1e, Sys Ver: 0x14, vBank: 0
FPGA: v6 (T4240QDS_2014_0211_1852), build 547 on Wed Feb 12 00:52:40 2014
SERDES Reference Clocks: SERDES1=125MHz SERDES2=125MHz SERDES3=100MHz SERDES4=100MHz
I2C: ready
SPI: ready
DRAM: Initializing....using SPD
Detected UDIMM M391B1G73QH0-CMA
Detected UDIMM M391B1G73QH0-CMA
Detected UDIMM M391B1G7EQH0-CMA
22 GiB left unmapped
DDR: 24 GiB (DDR3, 64-bit, CL=13, ECC on)
DDR Controller Interleaving Mode: 3-way 4KB
DDR Chip-Select Interleaving Mode: CS0+CS1
VID: Core voltage 1029 mV
Flash: 128 MiB
L2: 2048 KB enabled
enable l2 for cluster 1 fec60000
enable l2 for cluster 2 feca0000
Corenet Platform Cache: 1536 KB enabled
Using SERDES1 Protocol: 1 (0x1)
Using SERDES2 Protocol: 28 (0x1c)
Using SERDES3 Protocol: 6 (0x6)
Using SERDES4 Protocol: 12 (0xc)
SRIO1: enabled
SRIO2: disabled
NAND: 512 MiB
MMC: FSL_SDHC: 0
EEPROM: CRC mismatch (137e3224 != 00000000)
PCIe1: Root Complex, no link, regs @ 0xfe240000
PCIe1: Bus 00 - 00
PCIe2: disabled
PCIe3: Root Complex, no link, regs @ 0xfe260000
PCIe3: Bus 01 - 01
PCIe4: disabled
In: serial
Out: serial
Err: serial
Net: Fman1: Uploading microcode version 106.4.10
Failed to connect
Failed to connect
Fman2: Uploading microcode version 106.4.10
FM1@DTSEC5 [PRIME], FM2@DTSEC5
Hit any key to stop autoboot: 0
=>
Hello Chris,
You didn't use the correct u-boot image, you used the u-boot image for secure boot, please use the normal u-boot image u-boot-T4240QDS.bin, I attached it for you.
Have a great day,
Yiping
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Thank you, Yiping. This worked for running SDK 1.8 on bank 4.
Running "bitbake u-boot" had set the soft-link in deploy/images/t4240qds/ to the one for secure boot.
I assumed this was correct since we want to call esbc_validate from the u-boot command line before burning fuses, but I will open a separate discussion for this.
Hello Yiping,
It is a Rev 2.0 board. On bank 4, the RCW is now using the image titled rcw_1_27_5_11_1666MHz_rev2.bin from the SDK 1.8 ISO.
Bank 0 was left as SDK 1.5 and only bank 4 was updated to SDK 1.8.
When running from bank 4, there is no u-boot log shown upon reset now (after updating that bank to SDK 1.8).
Here are the commands used on bank 0 to update bank 4 (I don't have those logs anymore):
tftp 1000000 u-boot-T4240QDS_SECURE_BOOT.bin
protect off 0xebf40000 +c0000
erase 0xebf40000 +c0000
cp.b 1000000 0xebf40000 +c0000
protect on 0xebf40000 +c0000
tftp 1000000 fsl_fman_ucode_t4240_r2.0_106_4_15.bin
protect off 0xebf00000 +20000
erase 0xebf00000 +20000
cp.b 1000000 0xebf00000 20000
protect on 0xebf00000 +20000
tftp 1000000 rcw_1_27_5_11_1666MHz_rev2.bin
protect off 0xec000000 +20000
erase 0xec000000 +20000
cp.b 1000000 0xec000000 20000
protect on 0xec000000 +20000
I can post the u-boot log for bank 0 shortly, but it is still the default SDK 1.5 image.
Thank you!
Chris