Standalone T1042 Board U-boot SD-Card Startup Failure

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Standalone T1042 Board U-boot SD-Card Startup Failure

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mdursun
Contributor II

Hello,

We have designed a custom board with T1042 and DDR3L where bootup is done from SD-CARD. We are using T1042D4RDB board QORIQ LINUX project as reference to generate necessary BIN files.

We have generated RCW from QCVS and DDR Init Code from QCVS and successfully used them in QORIQ project. 

We have modified initdram function by adding QCVS initialization code at the begininng of it. Intiialization completes successfully. After it we are executing memory test on the DDR by using DDR_DDR_MTCR) and the test result is successful too.

At this point, we want to access DDR by using GET32 or DDR_IN32 functions but the processor hangs with the following error...

What could be the reason of this?

 

Bad trap at PC: fffdaffc, SR: 21200, vector=d00
**bleep**: FFFDAFFC XER: 00000000 LR: FFFDAFF0 REGS: fffd7ed0 TRAP: 0d00 DAR: 30000000
MSR: 00021200 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00

GPR00: FFFDAFF0 FFFD7FC0 FFFC8000 00000018 0000000A 00000020 00000020 FFFFFFFD
GPR08: 00000000 30000000 BCDEFDED FFFD7FC0 FFFE064C 10018100 00000000 00108001
GPR16: 80010100 00000100 90100000 00100504 10008000 90008100 00028101 00110100
GPR24: 90080004 10110002 30100100 00100005 FFFD8000 FE000C04 FFFE3C60 FE000C08

 

Best Regards,

Mustafa

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mdursun
Contributor II

Hello Oswalag,

We have figured out that the DDR-LAW settings were the reason of this problem. We have resolved it. Thanks for your interest.

Details: Previously, I had assumed that there was already an opened LAW for DDR, but was not. After that I assigned the LAW-0 to the DDR and than I was able to access DDR content. However, the code was being stucked at the end of the SPL stage while jumping to the u-boot code. The solution was again about the LAW. LAW-0 was being used by the BSP for other memories. Assigning the LAW-15 to the DDR solved the stucking problem.

Best Regards

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Oswalag
NXP TechSupport
NXP TechSupport

Hello,

Could you share the complete log of the failure?

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mdursun
Contributor II

Hello Oswalag,

We have figured out that the DDR-LAW settings were the reason of this problem. We have resolved it. Thanks for your interest.

Details: Previously, I had assumed that there was already an opened LAW for DDR, but was not. After that I assigned the LAW-0 to the DDR and than I was able to access DDR content. However, the code was being stucked at the end of the SPL stage while jumping to the u-boot code. The solution was again about the LAW. LAW-0 was being used by the BSP for other memories. Assigning the LAW-15 to the DDR solved the stucking problem.

Best Regards

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