STCU2 PLL question

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Pusoy
Contributor III

Hi,
In the "safety->STCU2" section of S32K3XXRM, there is a configuration register for PLL located at STCU2->RUNSW.

  1. When our clock configuration uses PLL, do we need to enable these two fields?
    Pusoy_0-1702273354554.png

     

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

Yes, you have to enable them if you use PLL for tests.

I guess SAF already has this enabled in some run function, but in case you have your own driver you have to take care of these bits.

Best regards,

Peter

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

Yes, you have to enable them if you use PLL for tests.

I guess SAF already has this enabled in some run function, but in case you have your own driver you have to take care of these bits.

Best regards,

Peter

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