1、Can the S32K344 be configured for dual core use?
2、If yes, how do you configure it? Please tell us the details.
Solved! Go to Solution.
Hello @1260784871,
A new DCF record with LOCKSTEP_EN = 0 has to be programmed into the UTEST OTP memory.
This can be done using by the C40 IP RTD driver.
First, locate your current DCF record in the UTEST be reading the memory via a debugger.
The first available space (all 0xFF) for a new record should be at 0x1B000768 for a device with the default configuration.
I will send you a simple test project.
Regards,
Daniel
Hello @1260784871,
A new DCF record with LOCKSTEP_EN = 0 has to be programmed into the UTEST OTP memory.
This can be done using by the C40 IP RTD driver.
First, locate your current DCF record in the UTEST be reading the memory via a debugger.
The first available space (all 0xFF) for a new record should be at 0x1B000768 for a device with the default configuration.
I will send you a simple test project.
Regards,
Daniel
The data I read from 0x1B000768 is D7 2A D5 82 50 00 04 00 D7 2A D5 82 70 00 04 00 D7 2A D5 82 B0 01 04 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ...So I write a new record at 0x1B000780.But it didn't work, and the chip was locked
Hi Daniel
What I read from UTEST does not agree with yours.After I wrote the DCF record to flash, the chip locked.This is my code ,Can you tell me what went wrong.
Hi @FrankLiu2019,
I see a colleague of mine responded to How-to-configure-the-S32K344-dual-core-operating-mode
BR, Daniel
I would also be interested in your simple test project. Where can O get it?
Thanks,
Jon
Hi @DrJonM,
Something like that:
#define program_address (0x1B000778) /* UTEST start address */
#define program_data1 (0x00100004) /* UTEST DCF Control Word */
#define program_data0 (0x00000100) /* UTEST Data Word, LOCKSTEP = 0, decoupled*/
/* UTEST Miscellaneous Register */
uint32_t utest_misc_dcf [ ] = {
(uint32_t)program_data0, /* DCF Data word 8h [0:31] */
(uint32_t)program_data1 /* DCF Control word Ch [32:63] */
};
volatile tFLASH_STATUS status;
int main(void)
{
PFLASH_Unlock(PFLASH_BL5, PFLASH_SS0, PFLASH_S0);
if((*(uint32_t*)program_address) == 0xFFFFFFFF)
{
status = FLASH_Write((uint32_t*)program_address, utest_misc_dcf, sizeof(utest_misc_dcf));
}
else{
__asm__("NOP");
}
for (;;) {
}
return 0;
}
Regards,
Daniel
I want to divide the core frequency by 2, after executing the following statement, I can not download the code. May I ask why
Hi Daniel
Could you send me the project? I also need unlock the second core and tried by myself failed.
Thanks
I want to divide the core frequency by 2, after executing the following statement, I can not download the code. May I ask why
thanks~