S32K342 DMA ISR is not getting triggered even after SPI DMA request enabled

[bbaskii]

Hi NXP Team,

I am using S32K342 WITH ETAS AutosarOS for a project. In that I am using LPSPI3 module for 64 byte transfer and to reduce the CPU overhead i wanted to use DMA. But When i configure the DMA with Global config with normal DMA transfer, I am not getting the DMA ISR and this causes the LPSPI_3_TxDma_Handler callback was not called eventually data is not transferred. It would be of great help if anyone faced similar situation please suggest a solution or NXP experts please guide me here to fix the issue.

Thanks In Advance,

Bbaskii

[danielmartynek]

Hi @bbaskii,

Which version of the RTD do you use?

Have you configured the DMA MUX?

Thanks,

Daniel

[bbaskii]

Hi Daniel,

I am using EBTresos for configuration and I have enabled DMA MUX in Global Configuration. I am using RTD 4.4_2.0.0 and I noticed the DMS ISR is working when I use Platform -> Interrupt Controller and enabling the ISR. But the same configuration is not working with ETAS Autosar OS even after enabled the same ISR with correct IRQ number. I have tried everything possible I could think of, If you have faced similar issue please suggest me a solution. 

P.S I have also tried Transfer config and enabling Major Interrupt as well, but still not working. And I know the DMA concepts only, new to hands on.

Thanks and Regards,

Bbaskii

[bbaskii]

Hi NXP Team/Daniel,

When I Debug the application, I also noticed that in S32K342 eDMA register Management Page Error Status (ES) VLD and SBE field are set to 1. But the same is not observed in Example project in baremetal configuration. Is this due to any configuration error. Any help would be highly appreciated.

Thanks & Regards,

Bbaskii

[cuongnguyenphu]

Can you dump all SPI , DMA and ARM system register for me? I would like to check that which error occured

[bbaskii]

Hi,
Sorry for the delay in reply. I have sent the register dump. Kindly look into that and let me know any configuration issues.
Thanks,
bbaskii

[bbaskii]

Hi,

Please find the attached Register dump of SPI, DMA and ARM Registers. Please let me know if you find any configuration issues and suggest the changes as well.

Thanks,

bbaskii

[bbaskii]

Hi NXP Team,

I found the DMA ISR is triggered after I moved the SPI variables to NO_CACHEABLE area while I search about the issue in NXP community forum. But now i stuck in SPI Transfer and not getting Spi_GetSequenceResult function call because i am not getting SPI_SEQ_OK. My question here is While i use DMA Fast Transfer, Should I use Spi_GetSequenceresult function or not. My project requirement is 64 bytes data transfer using LPSPI3 with DMA fast transfer and if i am not using Spi_SequenceResult I didn't find all the 64bytes data transferred. Any immediate help here would be highly appreaciated.

Thanks,

bbaskii

[cuongnguyenphu]

Hi, Event while using DMA transfer, you still need Spi_GetSequenceResult if you use asynchonous method.
Please check my attached example using DMA to refer