S32K324 TRGMUX question

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

S32K324 TRGMUX question

323件の閲覧回数
witness
Contributor III

hi, everyone

Now I am working on S32K324 project, and we use emios0 channel1~channel7, ch2-ch7 are based on counter bus A, and ch1 is based on counter bus B, besides, we also use PWM trigger ADC, it works. but for trgmux configuration, I don't know why the hardware input select "TRGMUX_IP_INPUT_EMIOS0_IPP_CH1", and what is the principle for this hardware input configuration?

witness_0-1691029622684.png

 

0 件の賞賛
返信
1 返信

297件の閲覧回数
_Leo_
NXP TechSupport
NXP TechSupport

Hi,

Thank you so much for your interest in our products and for using our community.

The hardware trigger signals for ADC can be provided from BCTU and TRGMUX outputs. I recommend you to refer to 4.2. Hardware triggers section of AN13413.

Hope it helps you.

Have a nice day!

0 件の賞賛
返信