Hi@pavankishore1
First I want to say that your understanding is correct.
According to: AN12522-S32K1xx ECC Error Handling.
2.1 SRAM initialization after power-on-reset
The reset state of the SRAM is unknown, thus data may contain random data. Most probably the first read attempt to any address would generate non-correctable ECC error. It is essential that each memory address be written to a known value before being read. If an uninitialized memory address is read, it is likely the read will result in a multiple-bit ECC error and an errored transaction on the AHB. Therefore, the SRAM must be initialized after power-up and this includes the peripherals RAM memories as the LPUART and FlexCAN RAMs.
But you forgot that the SRAM has been initialized by default when power is on. So you need to modify the startup code to turn off the power-on initialization of the SRAM.
I tested this code on Keil and the result is the same as you expected.
BR!
Jim,