S32K144/146/148 SENT protocol receivers

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S32K144/146/148 SENT protocol receivers

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carpenter
Contributor II

Hi there,

I've found this example project, which implements a SENT protocol receiver, using FTM and DMA:

https://community.nxp.com/t5/S32K-Knowledge-Base/SENT-receiver-for-S32K118-Design-Studio/ta-p/112735...

Can someone share some experience with the SENT protocol interface? I'm wondering how stable this works. What are the limits based on your experiences? What conditions have to be considered when implementing more SENT receivers? Is it possible to use all the FTM channels? Am I limited to the number of FTMs of the controller?

Using the provided concept, is it possible to handle up to 8 sensors by receiving their data via SENT on a S32K14x? I will try to connect some more SENT transmitters, but I have doubts that this can be handled easily.

 

I'm working on a proof of concept and I look forward to hear about your experiences and opinions.

 

kind regards

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

The example is just for a reference, you would need to test it with 8 channels.

Both the FTM and the DMA work without CPU load, just the data needs to be processed.

All the FTM channels can be used in the Input Capture mode (RM, rev12.1, Table 47-1. FTM instances and features).

There are up to 16 DMA channels

danielmartynek_0-1607526986354.png

But not every FTM channel has its DMA-MUX transfer request

(S32K1xx DMA Interrupt Mapping.slsx)

danielmartynek_1-1607527326530.png

Please take a look at Section 18.1.1 Seamless eDMA transfer.

 

Regards,

Daniel

 

 

 

 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

The example is just for a reference, you would need to test it with 8 channels.

Both the FTM and the DMA work without CPU load, just the data needs to be processed.

All the FTM channels can be used in the Input Capture mode (RM, rev12.1, Table 47-1. FTM instances and features).

There are up to 16 DMA channels

danielmartynek_0-1607526986354.png

But not every FTM channel has its DMA-MUX transfer request

(S32K1xx DMA Interrupt Mapping.slsx)

danielmartynek_1-1607527326530.png

Please take a look at Section 18.1.1 Seamless eDMA transfer.

 

Regards,

Daniel

 

 

 

 

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